T-shaped nano gate and preparation method thereof
A nanometer and gate cap technology is applied in the field of T-type nanometer gate and its preparation, which can solve the problems of complex process and high parasitic capacitance, and achieve the effects of improving resolution, reducing parasitic capacitance and improving frequency characteristics.
Active Publication Date: 2020-02-18
THE 13TH RES INST OF CHINA ELECTRONICS TECH GRP CORP
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[0004] Aiming at the problems that the existing dielectric-assisted T-type nano-gates are prepared with complex process and high parasitic capacitance, the present invention provides a T-type nano-gate and its preparation method
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[0047] In order to make the object, technical solution and advantages of the present invention more clear, the present invention will be further described in detail below in conjunction with the examples. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.
[0048] The present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.
[0049] For an example, see figure 1, the embodiment of the present invention provides a T-shaped nano-gate 110 , including a grid root 1102 and a grid cap 1101 . The T-shaped nano-gate 110 is grown on the substrate 101, and the bottom dielectric passivation layer 102, the middle dielectric passivation layer 103 and the top dielectric passivation layer 104 are grown on the upper surface of the substrate 101 sequentially from bottom to top. Wherein, the gate root 1102 is grown on t...
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Abstract
The invention relates to the technical field of microelectronic devices, and particularly discloses a T-shaped nano gate and a preparation method thereof. The T-shaped nano gate grows on a substrate with three dielectric passivation layers, and the three dielectric passivation layers comprise a bottom dielectric passivation layer, a middle dielectric passivation layer and a top dielectric passivation layer; the gate root penetrates through the middle dielectric passivation layer and grows on the substrate, the gate root is not in contact with the bottom dielectric passivation layer, and the lower surface of the gate cap is in contact with the upper surface of the middle dielectric passivation layer. The gate root of the T-shaped nano gate is suspended and is not in contact with the passivation medium, and the gate cap covers the middle medium passivation layer, so that gate inversion during gate stripping caused by no medium support is avoided, gate parasitic capacitance can be reduced, and the purpose of improving the frequency characteristic of a device is achieved.
Description
technical field [0001] The invention relates to the technical field of microelectronic devices, in particular to a T-shaped nano-gate and a preparation method thereof. Background technique [0002] The performance of the high electron mobility transistor (HEMT) device is closely related to the processing technology of the device, especially the fabrication of the gate line plays a decisive role in the device. The smaller the gate length, the current cut-off frequency of the device (f T ) The higher the noise figure of the device is, the smaller the noise figure of the device is. People can obtain devices with better characteristics by continuously reducing the gate length of HEMT devices. At present, the gate length of advanced GaAs, InP, and GaN devices at home and abroad has been reduced to less than 100nm. However, as the gate length shortens, the gate resistance increases, and the increase in gate resistance becomes one of the important factors restricting the performan...
Claims
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IPC IPC(8): H01L21/285H01L29/41H01L29/423H01L29/778
CPCH01L29/42316H01L29/413H01L21/28537H01L21/2855H01L21/28581H01L21/28587H01L29/778
Inventor 顾国栋吕元杰敦少博梁士雄冯志红
Owner THE 13TH RES INST OF CHINA ELECTRONICS TECH GRP CORP