Method for determining semiconductor wafer edge polishing shape

Abstract

The invention provides a method for determining a semiconductor wafer edge polishing shape, and the method comprises the steps: (1) obtaining a height curve of a boundary region of the surface and theedge of the semiconductor wafer through a laser microscopic system; (2) obtaining a first tangent line and a second tangent line of the height curve according to the height curve; (3) obtaining a region area At defined by the height curve, the first tangent line and the second tangent line; (4) obtaining the maximum vertical distance H from the height curve to the connecting line according to theconnecting line of the first tangent point and the second tangent point; and (5) obtaining the ratio L1 / Lr of the first length to the second length according to the intersection point of the first tangent line and the second tangent line. Based on the method provided by the invention, the height change of the boundary region is measured through the laser microscopy system; the measurement range of the boundary region is 10-1000 microns, and the accuracy of the measurement height can reach 1 nanometer. On the basis of a precisely measured height curve, various geometric parameter values at thejunction of the surface and the edge of the semiconductor wafer are calculated, so that the wafer manufacturing is monitored by the parameters, and the yield of a chip manufacturing process is improved.

Description

Technical field [0001] The present invention relates to the technical field of chip manufacturing. Specifically, the present invention relates to a method for determining the polished shape of the edge of a semiconductor wafer. Background technique [0002] With the rapid development of chip manufacturing processes to the 10nm / 7nm / 5nm era, the edge shape and defects of the silicon wafers are critical to the impact of high-end chip manufacturing processes (nodes ≤ 10nm). In the M1 standard of the International Semiconductor Industry Association (SEMI-standard M1), although a variety of silicon wafer edge shape types and flatness parameters are defined, these shape parameters (such as curvature) are important for high-end chip manufacturing processes. It is not enough, especially for the transition region or near edge region (transition region or near edge region) there is no clear specification. In addition, the edge removal area of ​​the advanced high-end chip technology at this...

AI Technical Summary

Problems solved by technology

In the M1 standard (SEMI-standard M1) of the International Semiconductor Industry Association, although the edge shape types and flatness parameters of various silicon wafers are defined, these shape parameters (such as curvature) are not necessary for high-level chip manufacturing processes. It is not enough, especially there is no clear specification for the transition region or near edge region between the surface and the edge

Moreover, the edge removal area of ​​the current advanced high-end chip technology has been reduced to 1mm, so that the shape of the junction between the surface and the edge of the silicon wafer and epitaxial wafer has a more significant impact on the yield.

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