PHY parameter debugging method and device, storage medium and electronic equipment

Abstract

The invention provides a PHY parameter debugging method and device, a storage medium and electronic equipment. When the processor obtains an initialization loading completion indication signal, the processor starts to modify the data in the static random access memory; when the data in the static random access memory is modified, the processor sends a first trigger instruction to the PCIe PHY, thePCIe PHY is enabled to read the data from the static random access memory, and is used for executing a calibration and adaptive algorithm of each channel in a PCIe PHY, the PCIe PHY is matched with the currently installed mainboard, so that the PCIe PHY can be normally started and operated, the problem that PHY parameters cannot be adjusted due to the fact that data in a read-only memory cannot be modified in the prior art is solved, and the PCIe PHY can be matched with more mainboard equipment.

Description

technical field [0001] The present application relates to the field of computer technology, in particular, to a PHY parameter debugging method, device, storage medium and electronic equipment. Background technique [0002] PCIe (Peripheral Component Interconnect Express) is a high-speed serial computer expansion bus standard, proposed by Intel in 2001, is the third generation of high-speed serial bus, designed to replace the old PCI, PCI-X, AGP bus standards. Since its introduction, PCIe has been widely used in personal computers, servers, solid-state drives, data centers and other fields with its fast transmission rate, end-to-end reliable transmission, support for hot plugging, power management, and quality of service. [0003] When the chip with PCIe function is replaced to a different motherboard. The current parameter information of the PCIe PHY may not match the new motherboard, resulting in the failure of the PCIe PHY to operate normally. Contents of the invention ...

AI Technical Summary

Problems solved by technology

The current parameter information of the PCIe PHY may not match the new motherboard, resulting in the failure of the PCIe PHY to operate normally

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