Array substrate, display panel, and electrical testing method

Abstract

An array substrate, a display panel, and an electrical testing method, the array substrate comprising: a substrate including a display area and an electrical testing area; a thin film transistor layer disposed on the substrate, the thin film transistor layer comprising a The test thin film transistor in the electrical test area, wherein the test thin film transistor includes an active layer, a gate layer, and an electrode layer, and one end of the active layer is connected to the first electrode of the electrode layer, so The other end of the active layer is suspended; the planarization layer is arranged on the electrode layer of the thin film transistor, wherein the planarization layer is provided with a first via hole corresponding to the first electrode of the electrode layer; the common An electrode layer is disposed on a side of the planarization layer away from the electrode layer, and the common electrode layer is connected to the first electrode of the electrode layer through the first via hole.

Description

【Technical field】 [0001] The invention relates to the field of display technology, in particular to an array substrate, a display panel and an electrical testing method for the array substrate. 【Background technique】 [0002] With the gradual popularity of low temperature polysilicon (LTPS) liquid crystal display panels, the circuit design of the thin film transistor layer is becoming more and more refined, and the pixel density (pixels per inch, PPI) of small-sized panels is also gradually increasing. Display panels require multiple processes in the Array segment. In the manufacturing process, there is a non-functional dummy thin-film transistor on the outermost periphery of the thin-film transistor layer, which is only used as a reference boundary when printing polyimide (PI) film, and does not play a display role. When the gate insulating layer (gateinsulator, GI) thin film falls off between the gate layer and the active layer, the gate layer and the active layer will le...

AI Technical Summary

Problems solved by technology

When the gate insulating layer (gateinsulator, GI) film falls off between the gate layer and the active layer, the gate layer and the active layer will leak due to short circuit, resulting in abnormal horizontal lines on the display screen

However, due to the limited capacity of the electrical testing machine itself, it is impossible to detect the area with a distance of about five pixels on the left and right sides of the panel. Therefore, this problem cannot be detected by the electrical testing machine immediately after the thin film transistor manufacturing process is completed. waste of

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