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Dynamic latency of nand read command

A command and command queuing technology, applied in the field of memory devices, can solve rare problems that limit the effectiveness of multi-plane reading

Active Publication Date: 2021-05-11
MICRON TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Depending on the workload, this can and does happen, but may be rare
In some cases, this limits the effectiveness of multiplane reads

Method used

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  • Dynamic latency of nand read command
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  • Dynamic latency of nand read command

Examples

Experimental program
Comparison scheme
Effect test

example 1

[0105] Example 1 is a method for increasing the probability of parallel reads within a memory die of a memory device, the method comprising: performing, at a controller of the memory device, operations comprising: receiving a request to store in the a first host read command for data on a first portion of a die of the memory device; determining that the host read command queue is empty; in response to determining that the host read command queue is empty, delaying the first host read executing a command for a delay period; receiving a second host read command requesting data stored on a second portion of the die of the memory device during the delay period; and executing the second host read command in parallel a host read command and the second host read command.

[0106] In Example 2, the subject matter of Example 1 includes, wherein the delay period is variable and determined based on a depth of the host read command queue.

[0107] In Example 3, the subject matter of Exam...

example 9

[0113] Example 9 is a memory device comprising: a NAND die comprising a plurality of distinct portions; a controller configured to perform operations comprising: receiving a request to store all a first host read command for data on a first portion of the plurality of different portions of the die; determining that the host read command queue is empty; in response to determining that the host read command queue is empty, delaying execution of the first host read command a host read command for a delay period; receiving a second host read command requesting data stored on a second portion of the die of the memory device during the delay period; and executing in parallel the The first host read command and the second host read command.

[0114] In Example 10, the subject matter of Example 9 includes, wherein the delay period is variable, and wherein the operations include determining a delay period value based on a depth of the host read command queue.

[0115] In Example 11, t...

example 16

[0120] Instance 16 is a machine-readable medium storing instructions that, when executed by a controller, cause the controller to perform operations comprising: receiving data requested to be stored on a first portion of a die of a memory device Determining that the host read command queue is empty; in response to determining that the host read command queue is empty, delaying execution of the first host read command for a delay period; during the delay receiving a second host read command requesting data stored on a second portion of the die of the memory device during a time period; and executing the first host read command and the second host read command in parallel Order.

[0121] In Example 17, the subject matter of Example 16 includes, wherein the delay period is variable, and wherein the operations include determining a delay period value based on a depth of the host read command queue.

[0122] In Example 18, the subject matter of Example 17 includes, wherein the ope...

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PUM

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Abstract

This application deals with dynamic latency of NAND read commands. Methods, systems, memory devices, and machine-readable media are disclosed in some instances to increase read throughput by introducing a delay before issuing a command to increase the odds that read commands can be executed in parallel. After receiving a read command, the controller may use a timer to delay issuing the read command if there are no other read commands in the command queue for a given portion of the die (eg, a plane or group of planes) for a delay period. If an eligible read command is received during the delay period, the delayed command and the most recently received command are issued in parallel using multi-plane read. If an eligible read command is not received during the delay period, the read command is issued after the delay period expires.

Description

technical field [0001] The present disclosure relates generally to memory devices, and in particular, to read commands for memory devices. Background technique [0002] Memory devices are typically provided as internal semiconductor integrated circuits in computers or other electronic devices. There are many different types of memory, including volatile and non-volatile memory. [0003] Volatile memory requires power to maintain its data and includes Random Access Memory (RAM), Dynamic Random Access Memory (DRAM) or Synchronous Dynamic Random Access Memory (SDRAM), among others. [0004] Non-volatile memory can retain stored data when it is not powered, and includes flash memory, read-only memory (ROM), electrically erasable programmable ROM (EEPROM), static RAM (SRAM), erasable Programmable ROM (EPROM), resistance variable memory such as phase change random access memory (PCRAM), resistive random access memory (RRAM), magnetoresistive random access memory (MRAM) or 3D XPo...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C16/04G11C16/08G11C7/22G06F13/16
CPCG11C16/0483G11C16/26G11C16/32G06F3/0679G06F3/0611G06F3/0659G06F12/0246G06F13/1642G06F2212/1024
Inventor D·A·帕尔默
Owner MICRON TECH INC