Method of forming interconnect structure and method of planarizing substrate

Abstract

The invention relates to a method of forming an interconnect structure and a method of planarizing a substrate. The present disclosure relates to a method of forming an interconnect structure. The method can include providing a semiconductor substrate; depositing a photoresist and a BARC layer on the semiconductor substrate; forming an opening in the photoresist and the BARC layer and a portion ofthe semiconductor substrate; depositing a conductive material to fill the opening; and planarizing the conductive material and the semiconductor substrate.

Description

technical field [0001] Embodiments of the present disclosure relate to methods of forming interconnect structures and methods of planarizing substrates. Background technique [0002] The semiconductor integrated circuit industry has experienced rapid growth. Technological advances in integrated circuit materials and design have produced multiple generations of integrated circuits, with each generation having smaller and more complex circuits than the previous generation. However, these advances have increased the complexity of processing and manufacturing integrated circuits, and for these advances to be realized, similar developments in integrated circuit processing and manufacturing are required. During the evolution of integrated circuits, functional density (ie, the number of interconnected elements per die area) has generally increased while geometry size (ie, the smallest feature (or line) that can be created using a process) has decreased. Scaled-down processes gene...

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Problems solved by technology

However, these advances have increased the complexity of processing and manufacturing integrated circuits, and for these advances to be realized, similar developments in integrated circuit processing and manufacturing are required

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