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On-chip CPU/GPU streamlined computing method based on Linux and computer system

A computing method and pipeline technology, applied in the computer field, can solve the problems of lack of pipeline task execution mechanism, inability to make full use of heterogeneous CPU/GPU systems on a chip, and affect the overall efficiency of the system, so as to ensure cache consistency and no loss Concurrency and ease of use

Pending Publication Date: 2020-05-22
HUNAN UNIV
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  • Claims
  • Application Information

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Problems solved by technology

[0006] The main purpose of the present invention is to provide a kind of, aim at on-chip CPU / GPU pipelining calculation method and computer system based on Linux, to solve the existing on-chip heterogeneous CPU / GPU system that lacks a good pipelined task execution mechanism, cannot fully Using the pipeline components in CPU-GPU computing will affect the overall efficiency of the system.

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  • On-chip CPU/GPU streamlined computing method based on Linux and computer system
  • On-chip CPU/GPU streamlined computing method based on Linux and computer system
  • On-chip CPU/GPU streamlined computing method based on Linux and computer system

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Embodiment Construction

[0052] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of the present invention.

[0053] In addition, in the present invention, descriptions such as "first", "second" and so on are used for description purposes only, and should not be understood as indicating or implying their relative importance or implicitly indicating the quantity of indicated technical features. Thus, the features defined as "first" and "second" may explicitly or implicitly include at least one of these features. In the description of the present invention, "pl...

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Abstract

The invention discloses an on-chip CPU / GPU streamlined computing method based on Linux and a computer system. The on-chip CPU / GPU streamlined computing method comprises the steps: reordering tasks according to the maximum utilization rate of an assembly line; performing cache refreshing after the task of initiating the write request to the cache is completed; when the GPU computing core is idle, distributing the parallel computing type tasks in the tasks to the GPU computing core; when the CPU computing core is idle, distributing the serial, IO or logic tasks in the tasks to the CPU computingcore; and stipulating the task data into the corresponding initiating CPU, and performing subsequent data processing by the CPU. Therefore, the on-chip heterogeneous multi-core computing system givesconsideration to different computing characteristics of the CPU core and the GPU core at the same time and can make full use of computing structures of all parts in equipment and has the advantages ofbeing high in performance and high in computing utilization rate.

Description

technical field [0001] The present invention relates to the field of computer technology, in particular to a Linux-based on-chip CPU / GPU pipeline computing method and a computer system. Background technique [0002] With the development of large-scale integrated circuits and a large number of applications of mobile Internet and artificial intelligence, it is difficult for pure central processing unit (CPU) computing to meet computing needs, and heterogeneous computing systems have emerged. The heterogeneous multi-core architecture, that is, the integration of multiple CPUs and graphics processing units (Graphics Processing Unit, GPU) on the same chip has gradually become a mainstream as an advanced architecture. Modern memory systems mainly reduce power consumption and improve performance based on the principle of locality of memory access requests. The CPU and GPU under the heterogeneous multi-core architecture share the on-chip main memory, so memory requests from differen...

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Application Information

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IPC IPC(8): G06F9/50G06F9/54G06F15/78
CPCG06F9/5027G06F9/546G06F15/7807G06F2209/548Y02D10/00
Inventor 黄一智刘彦张在美谢国琪李仁发
Owner HUNAN UNIV
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