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Floating-point number conversion circuit

A technology for converting circuits and floating-point numbers, which is applied in the field of data processing, can solve the problems of large floating-point numbers, multiple storage resources, read and write resources, and occupancy, and achieve the effects of improving efficiency, reducing resources, and reducing data bit width

Pending Publication Date: 2020-06-19
NANJING UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the floating-point numbers in the IEEE 754 data format occupy a large bit width, which in turn requires more storage resources and read and write resources.

Method used

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  • Floating-point number conversion circuit
  • Floating-point number conversion circuit
  • Floating-point number conversion circuit

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0047] Please refer to figure 2 , which exemplarily shows a schematic structural diagram of a floating-point number conversion circuit provided by an embodiment of the present application. Such as figure 2 As shown, the circuit includes a data input unit 101, a first data output unit 102, an LOD unit 103, an LZD unit 104, a first left shifter 105, a first multiplexer 106, a first data conversion unit 107, a first The second multiplexer 108 , the third multiplexer 109 , the second left shifter 110 , the second data output unit 111 , the third data output unit 112 and the combination unit 113 .

[0048] Wherein, the data input unit 101 is used to input a first floating point number, the first floating point number is a floating point number in posit data format, and the total bit width of the first floating point number is N;

[0049] The first data output unit 102 is used to discard the binary code of the last N-1 bits in the first floating-point number to obtain the binary...

Embodiment 2

[0064] Based on the above examples, please refer to image 3 , which exemplarily shows a schematic structural diagram of another floating-point number conversion circuit provided by the embodiment of the present application. Such as image 3 As shown, the circuit further includes a second data conversion unit 114 and a selection signal determination unit 115 .

[0065] Wherein, the second data conversion unit 114 is used for according to the highest bit of the first floating point number, if the highest bit is 0, then the first floating point number is a positive number, outputting the binary code of the last N-1 bits Original code; if the highest bit is 1, the first floating point number is a negative number, and the binary code of the last N-1 bits in the first floating point number is output after performing two's complement. Among them, the complementary code operation is about adding 1 after inverting the original code.

[0066] The selection signal determining unit 11...

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Abstract

The invention provides a conversion circuit of a floating-point number. The circuit can convert the floating-point number of the posit data format into the floating-point number of the IEEE754 data format. In the training process of a plurality of neural networks, the operation data approximately obeys normal distribution; according to the method, data can be concentrated near 0 through transformation, the preset total bit width of the floating-point number in the posit data format can be regulated and controlled, the data bit width can be reduced to a great extent, resources required for storage and resources consumed in the reading and writing process are reduced, and the neural network training efficiency is improved.

Description

technical field [0001] The present application relates to the technical field of data processing, in particular to a floating-point conversion circuit. Background technique [0002] With the advent of the era of big data, artificial neural network technology has developed rapidly. Artificial neural network is a non-linear and self-adaptive information processing system composed of a large number of interconnected processing units, trying to process information by simulating brain neural network processing and memory information. [0003] Artificial neural network includes two parts: data processing and data storage. Data processing refers to the operation and analysis of floating-point numbers to establish a neural network model; data storage refers to the storage of floating-point numbers. There are various data formats of floating-point numbers, such as the normalized single-precision floating-point number format of the IEEE 754 specification (referred to as the IEEE 754...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M7/24
CPCH03M7/24Y02D10/00
Inventor 王中风徐铭阳方超林军
Owner NANJING UNIV