1results about How to "Reduce bit width" patented technology

The invention relates to a rectangular coordinate-to-polar coordinate conversion method and device based on an LUT and CORDIC hybrid architecture. The method comprises the following steps: S1, sector folding preprocessing; s2, performing coarse rotation iteration; s3, generating a dynamic address; s4, a compression lookup table is queried; and S5, data compensation and reconstruction. According to the method, a small amount of CORDIC iteration is introduced to rotate the input vector to a very small angle range, so that the input space required to be covered by a subsequent lookup table is greatly compressed; meanwhile, the bit width and the address depth of a storage value in the LUT are remarkably reduced by combining module value residual storage and a dynamic truncation technology, so that the storage resources of the LUT are greatly reduced on the premise of ensuring the precision, and the hardware implementation cost is lower.