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Full-chip light source mask optimization key pattern screening method based on multi-width representation

A screening method and full-chip technology, applied in the direction of originals for optomechanical processing, optics, optomechanical equipment, etc., can solve the problem of reducing the accuracy of diffraction spectrum analysis of mask patterns, failing to fully describe the characteristics of diffraction spectra, and failing to achieve optimal problem

Active Publication Date: 2020-06-26
SHANGHAI INST OF OPTICS & FINE MECHANICS CHINESE ACAD OF SCI
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  • Claims
  • Application Information

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Problems solved by technology

However, only using the width in two directions cannot fully describe the characteristics of the diffraction spectrum, which reduces the accuracy of the mask pattern diffraction spectrum analysis, resulting in the use of key mask patterns screened by this technology for full-chip light source mask optimization. achieve optimal

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  • Full-chip light source mask optimization key pattern screening method based on multi-width representation
  • Full-chip light source mask optimization key pattern screening method based on multi-width representation
  • Full-chip light source mask optimization key pattern screening method based on multi-width representation

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Embodiment Construction

[0073] The present invention will be further described below in conjunction with embodiment and accompanying drawing, but should not limit protection scope of the present invention with this embodiment

[0074] The embodiment of the present invention adopts the same kind of technology in the commercial computing software Tachyon of ASML Company of the Netherlands, that is, the prior art 1, as a comparison object. The model of the simulation setting lithography machine is NXT:1950i lithography machine of ASML Company in the Netherlands, the exposure wavelength is λ=193nm, the polarization mode is XY polarization, the numerical aperture of the projection objective lens is NA=1.35, and the mask is a dark field binary mask. 34 mask patterns needing light source mask optimization are designed, including 10 one-dimensional periodic patterns, four two-dimensional periodic patterns and 20 non-periodic patterns. The present invention and the prior art 1 respectively screen key figures ...

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Abstract

The invention discloses a full-chip light source mask optimization key pattern screening method based on multi-width representation. According to the method, widths in multiple directions are used forrepresenting the main frequency characteristics of the mask pattern, and the coverage rule between the main frequencies, the main frequency clustering method and the key pattern screening method aredesigned on the basis of the widths in multiple directions of the main frequencies, so that the key pattern screening of the full-chip light source mask optimization is realized. The method comprisesfour steps of calculating a diffraction spectrum of a mask pattern, extracting a main frequency, clustering the main frequency and screening a key pattern. According to the method, the key mask patterns can be effectively screened out, and a process window for optimizing the full-chip light source mask is enlarged.

Description

technical field [0001] The invention relates to a photolithographic resolution enhancement technology, in particular to a key pattern screening method for optimizing a full-chip light source mask. Background technique [0002] Photolithography is one of the key technologies for integrated circuit manufacturing. Lithographic resolution determines the feature size of an integrated circuit. Source mask optimization (SMO) is one of the key lithographic resolution enhancement technologies, which is commonly used in the manufacture of integrated circuits at 28nm and smaller technology nodes. SMO improves the lithography resolution and increases the process window by jointly optimizing the light source and mask pattern. Compared with the light source optimization technology that optimizes the light source alone or the optical proximity effect correction technology that optimizes the mask pattern alone, the optimization degree of freedom is higher. The optimization capability of r...

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Application Information

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IPC IPC(8): G03F1/76G03F7/20
CPCG03F1/76G03F7/70216
Inventor 廖陆峰李思坤王向朝
Owner SHANGHAI INST OF OPTICS & FINE MECHANICS CHINESE ACAD OF SCI