Polycrystalline silicon etching method

Abstract

The invention discloses a polycrystalline silicon etching method, and relates to the field of semiconductor manufacturing. The method comprises the steps: providing a substrate, and forming shallow trench isolation in the substrate, wherein the shallow trench isolation is higher than an active region; sequentially covering the surface of the substrate with a polycrystalline silicon layer, a hard mask layer, a BARC and a light resistor; according to the pattern area defined by the photoresist, removing partial BARC through carbon tetrafluoride gas etching, wherein the thickness of the removed BARC is less than that of the BARC; removing the BARC above the shallow trench isolation through chlorine, oxygen and helium etching, and etching the BARC above the active area through chlorine, oxygenand helium according to time; etching the hard mask layer according to the pattern area defined by the photoresist, removing the photoresist and the BARC, and etching the polycrystalline silicon layer. According to the invention, the problem that in the prior art, the uniformity of the feature size becomes poor after the BARC over-etching process is added is solved, and the effects of improving the uniformity of the feature size and ensuring the size of the feature size are achieved.

Description

technical field [0001] The present application relates to the field of semiconductor manufacturing, in particular to a polysilicon etching method. Background technique [0002] When manufacturing semiconductor devices, shallow trench isolation is generally formed on the substrate, and the active region is defined by using the shallow trench isolation. In some cases, the shallow trench isolation will be higher than the active area to form a step, for example, the height difference between the shallow trench isolation and the active area is 500A, that is, the height of the step is 500A. [0003] As the complexity of the process increases, during the polysilicon gate etching process, polysilicon will remain at the angle between the shallow trench isolation and the surface of the active region, and the remaining polysilicon cannot be removed by etching. Such as figure 1 As shown, polysilicon 13 remains at the angle between the shallow trench isolation 11 and the surface of the...

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Problems solved by technology

[0004] However, when over-etching BARC, a part of the hard mask layer will also be etched away. Due to the different loading effects between different patterns, the hard mask layer corresponding to different patterns will produce different etching effects, resulting in uniform feature sizes. The performance is very poor, which affects the yield of semiconductor devices

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