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Manufacturing method of shallow trench isolation structure

A technology of isolation structure and manufacturing method, which is applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., and can solve problems such as limited improvement effect

Pending Publication Date: 2020-07-17
YANGTZE MEMORY TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
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Problems solved by technology

[0003] In the related art, the double hump phenomenon in the Id-Vg curve is improved by doping STI with boron by ion implantation, however, the improvement effect is limited

Method used

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  • Manufacturing method of shallow trench isolation structure
  • Manufacturing method of shallow trench isolation structure
  • Manufacturing method of shallow trench isolation structure

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Embodiment Construction

[0036] In order to make the technical solutions and advantages of the embodiments of the present invention more clear, the specific technical solutions of the invention will be further described in detail below in conjunction with the drawings in the embodiments of the present invention.

[0037] IC devices are typically fabricated on a substrate and contain multiple discrete circuit elements. In order to enable each discrete circuit element to work independently, the substrate needs to be fabricated into active areas (AA, Active Area) isolated from each other, and then the discrete circuit elements are fabricated in the AA. The STI structure is used to isolate the AA. Typical discrete circuit components are MOS devices. The structure of the MOS device includes: AA, source, drain and gate; wherein, the AA is located in the substrate, the gate is located above the AA, and the AA on both sides of the gate are respectively ion-implanted to form the source and drain, and the sour...

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Abstract

The embodiment of the invention provides a manufacturing method of a shallow trench isolation (STI) structure. The method comprises the steps: providing a substrate structure, wherein the substrate structure at least comprises a substrate; etching the substrate structure to remove a part of the substrate structure so as to form a trench in the substrate structure; annealing the substrate structureon which the groove is formed in a first gas atmosphere so as to perform boron doping on the side wall and the bottom of the groove, wherein the first gas comprises a gas containing a boron source and oxygen; and forming an insulating layer in the boron-doped groove. In this way, the effect of well improving the double-hump phenomenon in the Id-Vg curve can be achieved.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for manufacturing a shallow trench isolation structure. Background technique [0002] In a semiconductor integrated circuit (IC) device, a shallow trench isolation (STI, Shallow Trench Insulation) structure is generally used as an isolation region, so that various discrete circuit elements included in the IC device can work independently. In metal-oxide-semiconductor field-effect crystal (MOS, Metal-OxideSemiconductor Field Effect Transistor) devices prepared based on shallow trench isolation technology, such as figure 1 As shown, in the width direction of the MOS device, the gate covers part of the STI structure. When the gate voltage (Vg) is applied, the electric field at the edge of the gate ends at the side of the channel, making the channel edge region close to the STI structure The electric field increases, and this electric field makes the depletion layer ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/762H01L21/324
CPCH01L21/76237H01L21/324
Inventor 田武孙超
Owner YANGTZE MEMORY TECH CO LTD
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