Fan-out packaging structure and packaging method

Abstract

The invention provides a fan-out packaging structure and a packaging method, belonging to the technical field of chip packaging. The fan-out packaging structure includes a plate-shaped substrate with accommodating grooves formed on one side of the board, and a first redistribution layer and a second redistribution layer are respectively formed on both sides of the plate-shaped substrate. The wiring layer and the second rewiring layer are connected through conductive pillars, the conductive pillars penetrate the plate-shaped substrate, the first chip is placed in the accommodating groove, and the circuit pad of the first chip is located on the side away from the bottom of the accommodating groove. The first redistribution layer is connected, a first shielding body is arranged in the accommodation groove, and the first shielding body is arranged on the outer periphery of the first chip, and the second rewiring layer is connected to a second For the chip, a second shielding body is formed on the second rewiring layer, and the second shielding body is arranged on the outer periphery of the second chip. The encapsulation structure can shield the electromagnetic interference between the chips, so as to avoid defects caused by mutual interference between the chips, and improve the product performance of the encapsulation structure.

Description

technical field [0001] The present invention relates to the technical field of chip packaging, in particular to a fan-out packaging structure and packaging method. Background technique [0002] With the rapid development of the semiconductor industry, a Fan-out wafer level package (FOWLP) structure is widely used in the semiconductor industry. [0003] Among them, when packaging multiple chips, chips with different functions are generally packaged on both sides to achieve high-density integration, reduce the size of packaged products, improve product performance, and speed up signal transmission frequency. [0004] However, during the use of the current fan-out double-sided packaging structure, the electromagnetic interference generated between the internal chips cannot be shielded, which will easily cause mutual interference between the chips and cause defects, and reduce the performance of the packaged product. Contents of the invention [0005] The purpose of the prese...

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Problems solved by technology

[0004] However, during the use of the current fan-out double-sided packaging structure, the electromagnetic interference generated between the internal chips cannot be shielded, which leads to the mutual interference between the chips and causes defects, which reduces the performance of the packaged product.

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