Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

USB clock generation circuit

A clock generation circuit and circuit technology, applied in the direction of electrical digital data processing, instruments, etc., can solve the problems of slow start of crystal oscillator, limited product flexibility, expensive price, etc., and achieve the effect of ensuring application requirements

Active Publication Date: 2020-08-28
成都盛芯微科技有限公司
View PDF4 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The advantage of this method is: high frequency accuracy; the disadvantage is: the start-up of the crystal oscillator is slow, usually more than 1ms, resulting in a long time to wait for the start-up of the digital circuit
The disadvantage is: poor frequency accuracy
Or limit the frequency of the crystal oscillator, 24M or 48M, save an additional phase-locked loop, and use a simple double frequency circuit to generate a 48 MHz clock, but this limits the flexibility of the product (and the higher the crystal frequency, the more expensive it is)
Method 2 does not have the above disadvantages, but it needs to achieve frequency accuracy within plus or minus 2500ppm under process / temperature deviation, which requires additional circuit design efforts and circuit area
There is also method 3, which is to add additional processing in the digital domain to reduce the requirements for the accuracy of the USB clock, but this will also increase the cost and design difficulty

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • USB clock generation circuit
  • USB clock generation circuit
  • USB clock generation circuit

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0031] It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

[0032] The present invention will be further described below in conjunction with the accompanying drawings.

[0033] An embodiment of the present invention provides a USB clock generating circuit for generating a low-cost full-speed USB clock. The USB clock can be used not only for a USB module, but also for scenarios such as an MCU.

[0034] Such as image 3 , Figure 4As shown, the USB clock generation circuit includes a crystal oscillator circuit module, and the circuit also includes an RC oscillator module that provides a clock signal for the USB module, and the RC oscillator module is connected to the crystal oscillator circuit module and receives the crystal oscillator circuit module The reference clock CK_XO provided; the RC oscillator module includes an RCO subcircuit, a synchronous pulse generation subcircu...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses a USB clock generation circuit, which comprises a crystal oscillator circuit module and an RC oscillator module for providing a clock signal for the USB module, and is characterized in that the RC oscillator module is connected to the crystal oscillator circuit module and receives a reference clock provided by the crystal oscillator circuit module; the RC oscillator modulecomprises an RCO sub-circuit, a synchronous pulse generation sub-circuit, a counter sub-circuit, a switch control sub-circuit and a clock synthesis sub-circuit; the RCO sub-circuit outputs a first control signal; the synchronous pulse generation sub-circuit is connected to the crystal oscillation circuit module and outputs a second control signal; the counter sub-circuit is connected with the RCOsub-circuit and the synchronous pulse generation sub-circuit and outputs a third control signal; and the clock synthesis sub-circuit outputs a clock signal required by the USB module after operation.According to the technical scheme, the reference clock is provided through the crystal oscillator circuit module, and the synchronous pulse generation sub-circuit is added to enable the reference clock to synchronize the RCO sub-circuit, and the application requirement of the full-speed USB clock is met.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a USB clock generating circuit. Background technique [0002] At present, in SOC (System-on-a-Chip, system on chip), there are usually two types of methods for providing clocks for digital circuits: [0003] 1. Use a crystal oscillator to generate a reference clock, and then multiply the frequency by the internal PLL (Phase Locked Loop) to generate the required clock frequency, such as figure 1 shown. The advantage of this method is: high frequency accuracy; the disadvantage is: the start-up of the crystal oscillator is slow, usually more than 1ms, resulting in a long wait for the start-up of the digital circuit. [0004] 2. The RC oscillator is used, and after calibration, a more accurate clock is provided to the digital circuit, such as figure 2 shown. The method has the advantages of fast start-up, simple circuit and low cost. The disadvantage is: the frequen...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/42
CPCG06F13/4282G06F2213/0042Y02D10/00
Inventor 张歆
Owner 成都盛芯微科技有限公司
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products