Chip packaging structure and manufacturing method thereof
A technology of chip packaging structure and manufacturing method, which is applied in semiconductor/solid-state device manufacturing, electrical components, electrical solid-state devices, etc., can solve the problem that the rewiring layer and the cover film layer are easily damaged by external forces, and the reliability of the chip packaging structure is deteriorated, etc. problems, to avoid external damage and enhance reliability
Inactive Publication Date: 2020-09-04
FU TAI HUA IND SHENZHEN +1
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Problems solved by technology
[0004] However, the encapsulant of the existing chip packaging structure only covers the periphery of the chip, and the rewiring layer and protective layer (commonly used as polyimide, PI layer) are exposed outside the encapsulant, so that the sides of the encapsulant There is a height difference between the rewiring layer and the side of the cover film layer, which causes the rewiring layer and the cover film layer to be easily damaged by external forces, resulting in poor reliability of the chip packaging structure
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[0028] The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. Based on the implementation manners in the present invention, all other implementation manners obtained by persons of ordinary skill in the art without making creative efforts belong to the scope of protection of the present invention.
[0029] It should be noted that when an element is considered to be "connected" to another element, it may be directly connected to the other element or there may be an intervening element at the same time. When an element is referred to as being "disposed on" another element, it can be directly disposed on the other element or intervening elements may also be present. As used herein, the term "and / or" includes any and all c...
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The invention discloses a chip packaging structure, which comprises a first protective layer, a circuit reset layer formed on the first protective layer, a chip electrically connected with the circuitreset layer, and a glue sealing body coating the circuit reset layer and the chip, wherein the first protective layer comprises an exposed surface and at least four side edges connected with the exposed surface, and the glue sealing body comprises a glue sealing surface, and also coats at least four side edges of the first protective layer. According to the chip packaging structure provided by the invention, the circuit reset layer and the first protective layer can be prevented from being damaged by external force, so that the reliability of the chip packaging structure is enhanced.
Description
technical field [0001] The invention relates to the field of chip packaging, in particular to a chip packaging structure and a manufacturing method thereof. Background technique [0002] As the functions of integrated circuits become stronger and more integrated, packaging technology plays an increasingly important role in integrated circuit products, and the proportion of the value of the entire electronic system is also increasing. . At the same time, as the feature size of integrated circuits reaches the nanometer level, chips are developing towards higher density and higher clock frequency, and packaging is also developing towards higher density. [0003] Due to the advantages of miniaturization, low cost, high integration, better performance and higher energy efficiency of fan-out wafer-level packaging (flow) technology, fan-out wafer-level packaging technology has become a demanding An important packaging method for electronic devices such as mobile / wireless networks...
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IPC IPC(8): H01L23/31H01L21/56
CPCH01L23/3107H01L21/568H01L21/6835H01L2221/68345H01L23/3128H01L23/49822H01L21/4857H01L23/49816H01L2224/16237H01L23/293H01L24/09H01L24/17H01L2224/02381H01L23/5226H01L21/56H01L2224/0231H01L23/5283
Inventor 倪庆羽呂香桦刘扬伟
Owner FU TAI HUA IND SHENZHEN