Test circuit and chip

Abstract

The invention discloses a test circuit and a chip. The test circuit comprises a system unit and a test unit. A control module sends test information to a transmission module through a transceiver module; a processing module receives the test information through the transmission module, calls a component library module and a logic library module to generate an analog circuit, calls the test moduleto test the analog circuit to obtain an analog test result, and feeds back the analog test result to the control module through the transmission module; and when it is determined that the simulation test result is normal, the to-be-tested chip is connected through the test circuit, and the chip is tested according to the test information. The control module is connected with a chip to be tested through a test circuit, the universality of the chip test is improved through cooperation, the analog circuit is generated through cooperation, and simulation can be performed before the test so that the chip is protected before the test, the damage to the chip caused by the test is avoided, and the test information can be adopted to perform independent test on the special structure or function of the chip.

Description

technical field [0001] The invention relates to the field of chips, in particular to a test circuit and a chip. Background technique [0002] With the development of technology, the application of chips has become ubiquitous, providing many supports for smart life and work, but chip testing is a relatively big problem, which directly runs through the entire process of chip design and mass production, whether it is tape-out Whether the final wafer test (Wafer Test) or the final test after packaging (Final Test, also known as packaging test) or the final system-level test requires one, two or multiple tests, especially the wafer test , its test object is a large number of chips on the wafer, these chips are bare chips (Die), they can be the same or different, the pin (Pin) after the bare chip is not packaged is the end user The pins seen, only the silicon chip pins (Pads) that are finally packaged inside the chip, will be connected by wires between the Pad and the Pin during ...

AI Technical Summary

Problems solved by technology

[0007] In other words, all tests must be based on the chip, whether the chip is still on the wafer or the chip has been packaged. However, all tests have the problems of strong specifici

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