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Semiconductor device forming method and layout structure

A layout structure, semiconductor technology, applied in the direction of semiconductor devices, semiconductor/solid-state device manufacturing, electric solid-state devices, etc., can solve the problems of contact structure morphology defects, semiconductor device leakage, etc., and achieve the goal of solving leakage and shape defects Effect

Pending Publication Date: 2020-10-16
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The object of the present invention is to provide a method for forming a semiconductor device and a layout structure to solve the problem of the shape defect of the contact structure, and to solve the leakage of the semiconductor device caused by the shape defect of the contact structure

Method used

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  • Semiconductor device forming method and layout structure
  • Semiconductor device forming method and layout structure
  • Semiconductor device forming method and layout structure

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Embodiment Construction

[0035] The method for forming a semiconductor device and the layout structure proposed by the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. The advantages and features of the present invention will become clearer from the following description. It should be noted that all the drawings are in a very simplified form and use imprecise scales, and are only used to facilitate and clearly assist the purpose of illustrating the embodiments of the present invention.

[0036] Please refer to figure 1 , a schematic flow chart of the method for forming a semiconductor device provided in the embodiment. Such as figure 1 As shown, the semiconductor device forming method includes:

[0037] Step S1: providing a semiconductor substrate, the semiconductor substrate includes an active region and an isolation region, and a plurality of gate structures are formed on the semiconductor substrate of the isolatio...

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Abstract

The invention provides a semiconductor device forming method and a layout structure. A gap is formed between the side wall of a contact structure and the barrier layer covering the side wall layer, the contact structure can thus be prevented from being in contact with the gap in the barrier layer, so that the contact structure can be far away from the gap in the barrier layer, the problem of morphology defects of the contact structure can be solved, and the problem of electric leakage of the semiconductor device caused by the morphology defects of the contact structure can be further solved. An active region layout layer, a gate layout layer and a contact hole layout layer are designed; a contact hole pattern region of the contact hole layout layer is spaced from a gate pattern region of the gate layout layer; therefore, in the process of forming the semiconductor device by using the semiconductor device layout structure, a certain gap can be formed between the contact structure and the gate structure, so that the contact structure can be far away from the gap, and the problem of morphology defects of the contact structure is avoided.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for forming a semiconductor device and a layout structure. Background technique [0002] In the manufacturing process of a semiconductor device, it is usually necessary to form a contact structure for the connection between the semiconductor device and an external circuit. In the prior art, the method for forming a contact structure includes providing a semiconductor substrate, and then forming a contact structure on the semiconductor substrate. gate, forming a spacer on the sidewall of the gate, then forming a barrier layer (SAB) on the sidewall and the semiconductor substrate, and then forming an interlayer dielectric on the global surface of the semiconductor substrate layer, and form a contact structure in the interlayer dielectric layer. Wherein, in the process of forming the sidewall, an etching process is generally required, and the isotropic ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/768H01L27/02
CPCH01L21/76897H01L27/0207
Inventor 孙旭轩陈莉芬刘宇
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP