Feature chip selection method and device model establishment method in modeling process
A chip selection and modeling process technology, applied in the direction of instruments, special data processing applications, electrical digital data processing, etc., can solve the problems of low device model accuracy, uneven device formation process, and inability to accurately represent electrical characteristics. To achieve the effect of improving accuracy
Inactive Publication Date: 2020-10-30
CHANGXIN MEMORY TECH INC
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[0004] However, due to the inhomogeneity of the device formation process, devices of different sizes on the same bare chip cannot accurately represent the electrical characteristics of each size device, resulting in a relatively low accuracy of the device model of each feature size established by the device on the same bare chip. Low
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[0025] As mentioned in the background art, the accuracy of the existing device models needs to be further improved, mainly because the same characteristic chip is used to measure multiple characteristic dimensions of the same device to obtain measured values for modeling.
[0026] Please refer to figure 1 , is a schematic diagram showing the variation of the saturation threshold voltage (Vtsat) of NMOS transistors with different channel lengths on the same chip with the channel length.
[0027] Depend on figure 1 It can be seen from the figure that on the same feature chip, the variation trend of the threshold voltage of the NMOS transistor with the channel length is irregular, such as figure 1 The measured value circled in the center obviously deviates from the rule that the saturation threshold voltage changes with the channel length, and the corresponding test value at this feature size is obviously inaccurate. However, if the test value is used to model the device with...
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The invention relates to a feature chip selection method and a device model establishment method in a modeling process, and the feature chip selection method comprises the steps: providing a test wafer for modeling measurement, enabling a plurality of chips to be formed on the test wafer, and enabling a plurality of devices with different feature sizes to be formed in each chip; selecting a plurality of chips on the test wafer as test chips, and obtaining a plurality of measurement values corresponding to a plurality of to-be-tested devices with specific feature sizes; the measurement value with the numerical value located in the middle position or closest to the average value in the multiple measurement values is selected as a middle measurement value; and taking the chip where the to-be-measured device corresponding to the intermediate measurement value is located as a feature chip of the to-be-measured device with the specific feature size. According to the feature chip selection method, the modeling accuracy can be improved.
Description
technical field [0001] The invention relates to the technical field of semiconductors, in particular to a feature chip selection method in a modeling process. Background technique [0002] In the chip design process, it is necessary to rely on the SPICE model simulation structure to judge whether the memory design is good or bad. However, as the area of the memory shrinks, the components change more and more, and the precision requirements are getting higher and higher. In order to design high-quality and competitive products, SPICE models are needed to improve the accuracy of modeling and simulation. [0003] The device model is established by measuring the parameters in each direction for each device. Each device in the SPICE model library has several different critical dimensions, such as multiple transistors with different channel widths. On the wafer used for modeling measurement, devices under test with various feature sizes are formed on each die (DIE). For one ...
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IPC IPC(8): G06F30/398
Inventor 钱仕兵
Owner CHANGXIN MEMORY TECH INC