A latch-type amplifier offset elimination method and offset elimination circuit

Abstract

The invention discloses an offset elimination method and an offset elimination circuit of a latch type amplifier. The circuit includes two inverters for amplifying, four capacitors, 12 switches and two inverters for shaping. The input and output terminals of each amplifying inverter are respectively connected with each capacitor, and each switch is respectively connected between each inverter and the common mode level, power supply, ground, input and output signals; The discharged four capacitors store the mismatch between the four input tubes of the latch-type amplifier, and then perform sampling, pre-amplification and positive feedback rail-to-rail amplification of the input signal respectively, which can adjust all the input transistors of the latch-type amplifier. The offset caused by the mismatch is effectively eliminated, and it is suitable for both resistive and capacitive input conditions, which greatly improves its amplification accuracy, so that it has a similar offset suppression performance as an analog amplifier and expands its scope of application.

Description

technical field [0001] The invention relates to an offset elimination method and an offset elimination circuit of a latch type amplifier, in particular to an offset voltage that can eliminate the offset voltage caused by the mismatch of all input transistors of a latch type amplifier, and is suitable for resistive and capacitive input conditions at the same time. An offset elimination method and an offset elimination circuit for realizing the offset elimination method belong to the technical field of integrated circuit design. Background technique [0002] In the CMOS process, latch-type amplifiers can directly output rail-to-rail amplified signals due to their simple structure, and are widely used. as attached figure 1 As shown, the latch-type amplifier is usually composed of two inverters connected end to end and two power switches. When sampling and amplifying an external signal, first the two power switches are turned off, and the two inverters are connected to the powe...

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Problems solved by technology

attached figure 2 The source is paper 1: [LatchOffset Cancellation Sense Amplifier for Deep Submicrometer STT-RAM, IEEETRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS, VOL.62, NO.7, JULY 2015:1776-1784], by which figure 2 It can be seen that the circuit does not use capacitors for offset storage, but in the P2 phase, by applying the reference voltage VREF to the gate of M1, the gate and drain of M2, it can store the offset caused by the mismatch between M1 and M2 offset voltage, as attached image 3 As shown, this structure can only eliminate the offset voltage caused by the mismatch between M1 and M2, but cannot eliminate the offset voltage introduced by M3 and M4 when performing positive feedback amplification in the P4 stage

In addition, this structure also requires that the input signal must be able to provide driving capability for a long time. In the P1, P2 and P3 stages, the input needs to be connected to the circuit, and there is a charge loss. Therefore, it is only suitable for resistive input and cannot be used for capacitive input. In the case of sexual input

[0004] attached Figure 4 The source is paper 2: [A 45nm Self-Aligned-Contact Process 1Gb NOR Flashwith 5MB / s Program Speed, ISSCC 2008, SESSION 23, NON-VOLATILE MEMORY, 23.3:423-424], the circuit introduces two offset memory Capacitor, in the P2 stage, the offset caused by the mismatch of the two NMOS input pair tubes is eliminated. Although this structure is suitable for capacitive input, it cannot eliminate the offset caused by the PMOS input pair tube mismatch, and the actual effect is limited.

[0005] Synthesizing the status quo of offset cancellation of latch-type sampling amplifiers, it can be concluded that the existing offset cancellation methods generally have the following shortcomings: they cannot simultaneously cancel the offset of all input transistors, and cannot be applied to both resistive and capacitive input conditions, so that the latch-type amplifier cannot be applied to tiny signal amplification applications, which greatly limits its application range

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