Modular packaging structure and method

A packaging method and packaging structure technology, applied in the direction of semiconductor/solid-state device components, semiconductor devices, electrical components, etc., can solve the problems of low integration of heterogeneous integrated structures, achieve improved chip integration, high integration, and avoid The effect of flexural aging
CN111900155AInactive Publication Date: 2020-11-06SHANGHAI XIANFANG SEMICON CO LTD +1
12 Cites 2 Cited by

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
SHANGHAI XIANFANG SEMICON CO LTD
Publication Date
2020-11-06
Estimated Expiration
Not applicable · inactive patent

Smart Images

  • Figure 1
    Figure 1
  • Figure 2
    Figure 2
  • Figure 3
    Figure 3
Patent Text Reader

Abstract

The invention provides a modular packaging structure and method. The modular packaging structure comprises: at least one first module arranged in a stacked manner, each comprising a first chip and a second chip arranged opposite to each other, the first chip being electrically led out to a first surface and / or a second surface of the first module, and the second chip being electrically led out tothe first surface and / or the second surface of the first module; and a second module which is attached to the first module and comprises a third chip, wherein the third chip is electrically led out tothe first surface and / or the second surface of the second module, and the second module is electrically connected with the first module.
Need to check novelty before this filing date? Find Prior Art

Description

technical field

[0001] The invention relates to the technical field of semiconductor packaging, in particular to a modular packaging structure and method. Background technique

[0002] The existing preparation method of heterogeneous substrate integrated structure generally uses multi-layer heterogeneous substrate and organic metal wiring layer for line layout and signal interconnection, and then pastes multiple functional chips on one side, and realizes three-dimensional structure through space folding. 3D integration. Due to the use of multi-layer heterogeneous substrates and organic metal wiring layers in this method, the size in the Z direction will be very large after three-dimensional folding. For the small size currently required, the X and Y directions will be reduced while the Z direction will be greatly increased. The size and thickness of the above cannot effectively reduce the package volume of the structural parts and improve the integration of the microsystem....

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More