Modular packaging structure and method

A packaging method and packaging structure technology, applied in the direction of semiconductor/solid-state device components, semiconductor devices, electrical components, etc., can solve the problems of low integration of heterogeneous integrated structures, achieve improved chip integration, high integration, and avoid The effect of flexural aging

Inactive Publication Date: 2020-11-06
SHANGHAI XIANFANG SEMICON CO LTD +1
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] The purpose of the present invention is to provide a modular packaging structure and method to solve the problem of low integration of existing heterogeneous integrated structures

Method used

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  • Modular packaging structure and method
  • Modular packaging structure and method

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Embodiment Construction

[0055] The modular packaging structure and method proposed by the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. Advantages and features of the present invention will be apparent from the following description and claims. It should be noted that all the drawings are in a very simplified form and use imprecise scales, and are only used to facilitate and clearly assist the purpose of illustrating the embodiments of the present invention.

[0056]In addition, unless otherwise stated, features in different embodiments of the present invention can be combined with each other. For example, a feature in the second embodiment may be used to replace a corresponding or functionally identical or similar feature in the first embodiment, and the resulting embodiment also falls within the scope of disclosure or description of the present application.

[0057] The core idea of ​​the present invention is to ...

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Abstract

The invention provides a modular packaging structure and method. The modular packaging structure comprises: at least one first module arranged in a stacked manner, each comprising a first chip and a second chip arranged opposite to each other, the first chip being electrically led out to a first surface and/or a second surface of the first module, and the second chip being electrically led out tothe first surface and/or the second surface of the first module; and a second module which is attached to the first module and comprises a third chip, wherein the third chip is electrically led out tothe first surface and/or the second surface of the second module, and the second module is electrically connected with the first module.

Description

technical field [0001] The invention relates to the technical field of semiconductor packaging, in particular to a modular packaging structure and method. Background technique [0002] The existing preparation method of heterogeneous substrate integrated structure generally uses multi-layer heterogeneous substrate and organic metal wiring layer for line layout and signal interconnection, and then pastes multiple functional chips on one side, and realizes three-dimensional structure through space folding. 3D integration. Due to the use of multi-layer heterogeneous substrates and organic metal wiring layers in this method, the size in the Z direction will be very large after three-dimensional folding. For the small size currently required, the X and Y directions will be reduced while the Z direction will be greatly increased. The size and thickness of the above cannot effectively reduce the package volume of the structural parts and improve the integration of the microsystem....

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L25/16H01L23/367H01L23/31H01L21/50
CPCH01L25/16H01L23/367H01L23/3107H01L21/50H01L2224/18H01L2224/32145H01L2224/73253
Inventor 张凯曹立强耿菲
Owner SHANGHAI XIANFANG SEMICON CO LTD
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