Semiconductor structure and preparation method

Abstract

The invention relates to the technical field of semiconductors, in particular to a semiconductor structure. The semiconductor structure comprises a substrate having an active region defined by an isolation structure, embedded word lines extending in a first direction across the active region, an embedded bit line extending along at least part of the isolation structure with the extending directionintersected with the first direction, and an air gap positioned between the two adjacent embedded word lines. An embedded bit line is formed in an isolation structure, the bit line-unit coupling effect is reduced, the data sensing margin is improved, and moreover, an air gap is formed between the adjacent embedded word lines, and the dielectric constant of air is relatively small, so that the coupling effect of the adjacent embedded word lines can be reduced, the row hammering effect between the adjacent active regions is reduced, and the reliability of the semiconductor device is improved.

Description

technical field [0001] The present application relates to the field of semiconductor technology, in particular to a semiconductor structure and a preparation method. Background technique [0002] As the DRAM cell size (Cell Size) decreases, such as figure 1 As shown, the coupling (Coupling) between the bit line 11'-unit (Bit line-Cell) causes the problem of the data sensing margin (Data Sensing Margin), resulting in the coupling between the word line-word line (Word line-Word line) (Coupling) reliability issues. exist figure 1 In the DRAM cell (Cell) structure shown, the Disturbance and Row Hammer Effect caused by coupling (Coupling) between word line 12'-word line 12' (Word line-Word line) Reliability issues arise. Contents of the invention [0003] The present application solves the above-mentioned technical problems in the related art at least to a certain extent. For this reason, the present application proposes a semiconductor structure and a manufacturing method...

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Problems solved by technology

[0002] As the DRAM cell size (Cell Size) decreases, such as figure 1 As shown, the coupling (Coupling) between the bit line 11'-unit (Bit line-Cell) causes the problem of the data sensing margin (Data Sensing Margin), resulting in the coupling between the word line-word line (Word line-Word line) (Coupling) reliability issues

exist figure 1 In the DRAM cell (Cell) structure shown, the Disturbance and Row Hammer Effect caused by coupling (Coupling) between word line 12'-word line 12' (Word line-Word line) raises reliability issues

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