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Manufacturing method of shallow trench isolation structure

A technology of isolation structure and manufacturing method, which is applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems such as unstable yield rate and substrate damage, and achieve the effects of safe and convenient etching, avoiding damage, and reducing costs

Active Publication Date: 2020-11-13
南京晶驱集成电路有限公司
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The purpose of the present invention is to provide a method for manufacturing a shallow trench isolation structure, which solves the problem of damage to the substrate and the instability of electrical properties and yield when the existing shallow trench isolation structure is formed by etching. The manufacturing method is simple and convenient to operate

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  • Manufacturing method of shallow trench isolation structure
  • Manufacturing method of shallow trench isolation structure
  • Manufacturing method of shallow trench isolation structure

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Embodiment Construction

[0030] Embodiments of the present invention are described below through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation modes, and various modifications or changes can be made to the details in this specification based on different viewpoints and applications without departing from the spirit of the present invention.

[0031] It should be noted that the diagrams provided in this embodiment are only schematically illustrating the basic idea of ​​the present invention, and only the components related to the present invention are shown in the diagrams rather than the number, shape and shape of the components in actual implementation. Dimensional drawing, the type, quantity and proportion of each component can be changed arbitrarily during actual impleme...

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Abstract

The invention discloses a manufacturing method of a shallow trench isolation structure. The manufacturing method comprises the steps of: forming a hard mask layer on a substrate, and forming a shallowtrench through etching, wherein the hard mask layer comprises a pad oxide layer and a pad nitride layer located on the pad oxide layer; forming a barrier layer in the shallow trench and on the hard mask layer; etching a part of the barrier layer by using a first dry etching process until the part of the barrier layer stops at the pad nitriding layer; longitudinally and laterally etching the hardmask layer and a part of the residual barrier layer by using a second dry etching process until the hard mask layer and a part of the residual barrier layer are stopped on the substrate to form a shallow trench with a fillet, wherein the bias power adopted by the second dry etching process is 0-98W; and removing the remaining barrier layer in the shallow trench with the fillets by using a third dry etching process. Based on the method, excellent lateral etching efficiency is ensured, and damage to silicon is avoided.

Description

technical field [0001] The invention belongs to the technical field of integrated circuits, in particular to a method for manufacturing a shallow trench isolation structure. Background technique [0002] The Shallow Trench Isolation (STI) process is an important process for integrated circuit functions, which can prevent current leakage between adjacent semiconductor devices and play a role in other electrical properties. At present, in order to avoid the problem of tip discharge in the process of manufacturing shallow trench isolation structures by etching, it is often necessary to passivate the corners of shallow trench isolation structures to avoid potential problems, such as electrical properties and unstable yields. situation occurs. [0003] At present, the passivation corner of the shallow trench isolation structure is generally passivated by wet etching the silicon oxide and silicon nitride on the substrate laterally. However, when the silicon oxide is etched with h...

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Application Information

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IPC IPC(8): H01L21/762
CPCH01L21/76232
Inventor 林子荏杨智强林政纬林祐丞
Owner 南京晶驱集成电路有限公司