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Low-distributed capacitance layout method for primary winding of high-frequency integrated transformer

A technology that integrates transformers and primary windings. It is applied in transformers/inductor coils/windings/connections, instruments, electrical digital data processing, etc., to reduce losses, improve operating performance, and improve operating reliability.

Pending Publication Date: 2020-11-27
HEILONGJIANG UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0017] figure 1 The input series auxiliary power supply based on transformer integration in (b) is suitable for high-voltage input and multi-output applications. figure 1 Compared with the conventional high-frequency transformer shown in (a), the integrated transformer in this type of power supply will bear the high-voltage primary winding segment, and the distributed capacitance between multiple primary windings cannot be ignored for the design of the power converter However, there has been no report on the distributed capacitance between the multiple high-voltage primary windings of this type of integrated transformer, and there is no report on the layout method between multiple high-voltage primary windings of this type of integrated transformer.

Method used

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  • Low-distributed capacitance layout method for primary winding of high-frequency integrated transformer
  • Low-distributed capacitance layout method for primary winding of high-frequency integrated transformer
  • Low-distributed capacitance layout method for primary winding of high-frequency integrated transformer

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specific Embodiment approach 1

[0039] Specific implementation mode one: the following combination Figure 6 ~ Figure 13 Describe this embodiment, the low-distributed capacitance layout method of the primary winding of the high-frequency integrated transformer described in this embodiment, the method is: each primary winding is divided into p parts, and N primary windings are arranged in a layer-by-layer staggered layout. The side windings are wound in p layers, N>2, p≥2, and each primary winding is wound in a Z-shaped structure.

[0040] The number of turns of each layer of the primary winding is a=W / p, and W is the number of turns of each primary winding.

[0041] The N primary windings in each layer are arranged in the same order from inside to outside on the winding frame, and the arrangement order is the first primary winding PW 1 → The second primary winding PW 2 →...→Nth primary winding PW N , or the Nth primary winding PW N →...→2nd primary winding PW 2 →The first primary winding PW 1 .

[004...

specific Embodiment approach 2

[0072] Specific implementation mode two: the following combination Figure 14 and Figure 15 This embodiment is described. This embodiment further describes the first embodiment. The secondary winding of the transformer is equally divided into p-1 parts, and is wound between two adjacent layers of primary windings in a centralized layout.

[0073] like Figure 14 (a) is the interleaved single-layer primary winding layout method of the integrated transformer when the N primary windings adopt a two-layer structure (p=2) (PW in the figure 1 ,PW 2 ,...,PW N The order of arrangement can also be reversed, becoming: PW N ,...,PW 2 ,PW 1 ). Among them, the N primary windings are divided into two parts with the same structure, each part is equivalent to a single-layer structure, and the secondary winding (SW 1 ~SW n ) is wound centrally in the middle of the two primary windings to increase their spacing. There is another implementation of the proposed method, such as Figure...

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Abstract

The invention discloses a low-distributed capacitance layout method for a primary winding of a high-frequency integrated transformer, belongs to the technical field of power electronics and switchingpower supplies, and aims to solve the problem that the performance of the transformer is influenced because interlayer distributed capacitance is not considered in a multi-input primary winding of theconventional high-frequency transformer. According to the method, each primary winding is equally divided into p parts, p-layer winding is conducted on the N primary windings through layer-by-layer staggered layout, N is larger than 2, p is larger than or equal to 2, and each primary winding is wound through a Z-shaped structure, so that the layout of the multiple high-voltage primary windings ofthe integrated transformer is minimum in distributed capacitance energy storage influence.

Description

technical field [0001] The invention relates to the optimal design of distributed capacitor energy storage for primary windings of high-frequency integrated transformers, and belongs to the technical fields of power electronics and switching power supplies. Background technique [0002] At present, various high-voltage input occasions are gradually increasing. Limited by factors such as the voltage level of various devices, how to effectively reduce the voltage stress of each key device is an unavoidable problem in the design process of high-voltage power supplies. There are mainly four methods to solve high voltage stress: (1) use multiple power devices in series to replace a single device; (2) use various new wide bandgap power devices with higher voltage levels; (3) use multi-level technology; (4) adopt the way that many converters are input in series. Methods 1 to 3 can effectively solve the problem of high voltage stress of main power devices (switch tubes, diodes) in ...

Claims

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Application Information

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IPC IPC(8): H01F27/28G06F30/392
CPCH01F27/28G06F30/392
Inventor 孟涛王世刚李春艳安彦桦
Owner HEILONGJIANG UNIV