Method for manufacturing semiconductor device using planarization technique

Abstract

A method of manufacturing a semiconductor device, comprising: forming a nitride film, a BPSG film, and a boron or phosphorus-containing SOG silicon oxide film on a transistor element; heat treating the resulting wafer in a steam atmosphere; and heat treating the wafer in an inert gas atmosphere. The first heat treatment causes hydrolysis of the SOG film to form the SOG film in a gel state, and the second heat treatment cures the SOG film by removing moisture contained in the SOG film. Phosphorus or boron in the SOG film weakens the bonds in the -Si-O-Si- chains in the SOG film, helps the separation of the -Si-O-Si- chains, and the planarization of the SOG film.

Description

technical field [0001] The invention relates to a method for manufacturing a semiconductor device, in particular to the planarization technology of an interlayer dielectric layer. Background technique [0002] As the integration and speed of semiconductor devices increase, each element in the device must be composed of finer patterns. In order to obtain finer patterns, the current photolithography technology requires higher planarity or flatness of transistor elements and superimposed interlayer dielectric films. Examples of existing photolithography techniques include chemical mechanical polishing (CMP), however, this technique results in increased manufacturing costs of semiconductor devices and can only obtain limited topography due to the pattern of the interlayer dielectric film to be polished. [0003] Japanese Patent Publication JP-A-7-37879 proposes a planarization technology for a spin-on-glass (SOG) film formed by spin-coating silicon oxide on a semiconductor subs...

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Problems solved by technology

[0006] Due to the high melting point of BPSG, the technique of heat-treating BPSG films in a steam atmosphere requires heat-treatment temperatures as high as about 800°C to obtain sufficient planarization, but this temperature will affect the properties of the diffusion layer formed in the previous steps, and thus Causes degradation of transistor characteristics

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