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A 6t SRAM storage and calculation device, storage and calculation system and storage and calculation method

A storage part and weighted calculation technology, applied in the computer field, can solve the problems of large area, low storage and calculation efficiency and accuracy, and achieve the effect of simplifying the storage and calculation structure, reducing area loss, and reducing area occupancy.

Active Publication Date: 2021-03-05
中科南京智能技术研究院
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Moreover, the traditional storage and calculation structure 8T SRAM in the computer (8T means 8 transistors, and SRAM means static random access memory) has a large number of transistors and a large area. It adopts the calculation mode of 1-bit input, and its storage and calculation efficiency and accuracy are relatively high. Low

Method used

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  • A 6t SRAM storage and calculation device, storage and calculation system and storage and calculation method
  • A 6t SRAM storage and calculation device, storage and calculation system and storage and calculation method

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Embodiment 1

[0052] Such as figure 2 Shown is a schematic structural diagram of a 6T SRAM computing device 1 in Embodiment 1 of the present invention. The storage and calculation device 1 includes a storage part and a calculation part. Among them, the storage part is used to store the input weight; the calculation part is used to perform weighted calculation on the weight and the input data;

[0053] The storage part includes 4 transistors: transistor M1, transistor M2, transistor M3 and transistor M4; the calculation part includes 2 transistors: transistor M5 and transistor M6. G in the figure represents the gate of the transistor, S represents the source of the transistor, and D represents the drain of the transistor.

[0054] The source of the transistor M3 is connected to the bit line BL as the first weight input terminal of the storage and calculation device 1; the source of the transistor M4 is connected to the bit line BLB as the second weight input terminal of the storage and ca...

Embodiment 2

[0071] Such as image 3 It is a schematic structural diagram of a 6T SRAM storage and computing system in Embodiment 2 of the present invention.

[0072] Specifically, on the basis of the 6T SRAM computing device 1, an input driver 2, a column decoding and bit line driving module 3, a row decoder 4, and a weighted bitwise multiply-accumulate output module 5 are added.

[0073] in,

[0074] The input driver 2 is connected with the gate of the transistor M5 in the storage and calculation device 1 through the input line VWLM, and is used to input the first bit of data in the transistor M5; it is connected with the gate of the transistor M6 through the input line VWLL, and is used for inputting the first bit of the data to the transistor M6. The second bit of the input data in M6;

[0075] The column decoding and bit line driving module 3 is connected to the source of the transistor M3 in the storage device 1 through the bit line BL, and is used to input the first weight to the ...

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Abstract

The invention relates to a 6T SRAM storage and calculation device, a storage and calculation system and a storage and calculation method. The storage and calculation device includes a storage part and a calculation part, wherein the storage part includes 4 transistors, which control the writing of data and weights to the storage part; Weights are used for weighted calculations. The storage and calculation system takes the storage and calculation device as the core, uses the input driver to input and store the data, uses the row decoder to input and store the weight, uses the column decoding and bit line driver module to realize the transfer of the weight from the storage part to the calculation part, and uses the weighted The bit multiply-accumulate output module performs multiply-accumulate calculations on the output results of the calculation part. Compared with the prior art, the storage and calculation device and the storage and calculation system of the present invention can simplify the storage and calculation structure of the computer and reduce the occupied area; the storage and calculation method has higher calculation accuracy and calculation efficiency than the existing 1-bit input calculation method .

Description

technical field [0001] The invention relates to the technical field of computers, in particular to a 6T SRAM storage and calculation device, a storage and calculation system and a storage and calculation method. Background technique [0002] The storage and calculation ability of the computer affects the overall performance of the computer to a large extent. In the traditional calculation process of a computer, the weights used for calculation need to move back and forth between the memory and the computing unit, which requires high power consumption. Moreover, the traditional storage and calculation structure 8T SRAM in the computer (8T means 8 transistors, and SRAM means static random access memory) has a large number of transistors and a large area. It adopts the calculation mode of 1-bit input, and its storage and calculation efficiency and accuracy are relatively high. Low. [0003] Based on this, there is currently a need for a storage and calculation structure with ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C11/412G11C11/417G06F7/544
CPCG06F7/5443G11C11/412G11C11/417
Inventor 乔树山陶皓尚德龙周玉梅
Owner 中科南京智能技术研究院
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