3results about How to "Reduce area occupation" patented technology

This utility model discloses a folding cabinet door mechanism for narrow compartments, comprising a first cabinet door, a second cabinet door, a first door lock, a second door lock, a hinge, a guide rail, a slider, a lower cabinet door fixing bracket, an upper cabinet door fixing bracket, a guide rail fixing bracket, a rotating shaft, an upper rotating pin, and a lower rotating pin. The first and second cabinet doors are hinged together. The first and second door locks are respectively mounted on the first and second cabinet doors. The upper and lower rotating pins are located at the upper and lower ends, respectively, and are rotatably connected to the upper and lower cabinet door fixing brackets. The guide rail fixing bracket is fixed to the upper end of the opposite side of the compartment opening, and both ends of the guide rail are connected to the upper cabinet door fixing bracket and the guide rail fixing bracket, respectively. The slider slides within the guide rail. The lower end of the rotating shaft is connected to the second cabinet door, and the upper end of the rotating shaft is rotatably connected to the slider. This utility model has a simple structure, few parts, and low cost.

The application relates to the technical field of low-power consumption of integrated circuits, and discloses a RAM (Random Access Memory) voltage maintaining circuit and method in a sleep mode, which comprises a reference current generating module, a current mirror array module, a core voltage generating module and a digital calibration control module; the reference current generating module generates nanampere reference current; the current mirror array module outputs programmable mirror current; the core voltage generating module converts the mirror current into output voltage VOUT; and the digital calibration control module compares Vto with Vref when the chip is working, and outputs a calibration signal to adjust the mirror current. The core voltage generating module comprises a PVT self-adaptive bias structure composed of NMOS and PMOS tubes, so that the output voltage is automatically adjusted according to process, voltage and temperature. The application adopts an intermittent working mode of "calibration during working and maintaining during sleeping", and combines an open-loop source follower architecture, so that typical static power consumption of 50nA, PVT self-adaptive adjustment, rapid awakening and extremely small chip area are realized, and the application can be widely applied to super-low-power-consumption devices such as the Internet of Things.

This invention discloses a high-bandwidth, notch-free hybrid magnetocurrent sensor circuit, comprising a low-frequency path, a high-frequency path, a differential amplifier, a compensation path, and a dual-to-single converter. The low-frequency path utilizes a Hall effect sensor and auxiliary bias circuitry to detect the low-frequency component of the current, and simultaneously suppresses sensitivity drift and common-mode drift by replicating a negative temperature coefficient voltage. In the high-frequency path, the integrator consists of two paths with the same gain-bandwidth product but different low-frequency gains, and gain flatness is improved through compensation technology. The servo loop employs active capacitor amplification technology, using small-area resistors and capacitors to achieve ultra-low-frequency poles. The outputs of the high- and low-frequency paths are combined via a differential amplifier and then pass through a subtractor and a high-pass filter to form a compensation path for eliminating chopper ripple. Finally, the signals are converged in the dual-to-single converter to obtain a notch-free broadband output. This invention simultaneously solves problems such as chopper notch, gain unevenness caused by pole-zero mismatch, and the use of large-area passive components.