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Controller and method for processing dynamic scheduling related to mono-transmitting flow process line data

A data-related and dynamic scheduling technology, applied in the field of microelectronics, can solve problems that affect processor performance, cannot be applied to embedded system applications, and the processor cannot run at full speed, so as to improve performance, reduce area loss, and reduce the number of pauses. Effect

Inactive Publication Date: 2009-08-26
FUDAN UNIV
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Problems solved by technology

This way of solving data correlation causes the processor to not run at full speed, and the waiting process occurs frequently, which seriously affects the performance of the processor.
[0006] Due to the increasing speed requirements of modern embedded processors, this method of stopping the pipeline is no longer suitable for embedded system applications

Method used

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  • Controller and method for processing dynamic scheduling related to mono-transmitting flow process line data
  • Controller and method for processing dynamic scheduling related to mono-transmitting flow process line data
  • Controller and method for processing dynamic scheduling related to mono-transmitting flow process line data

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Embodiment Construction

[0035] The specific embodiments of the present invention will be described in detail below with reference to the drawings.

[0036] figure 2 It is a schematic diagram of the structure of the dynamic scheduling controller of the present invention.

[0037] In the present invention, the dynamic scheduling controller includes a decoding control unit 201 for decoding instructions. After obtaining the register usage information, the unit sends out the register usage flag bit. The dynamic scheduling control uses the state machine to detect data related The detection result of the unit is a condition, and the state jump is used to complete the transmission of instructions and the storage of instructions.

[0038] In the present invention, the dynamic scheduling controller includes an instruction buffer 202 for storing instructions related to the occurrence data.

[0039] In the present invention, the dynamic scheduling controller includes a data correlation detection unit 203, which is...

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Abstract

The invention belongs to the technical field of microelectronics, and specifically discloses a dynamic scheduling controller and a dynamic scheduling method related to processing single emission pipeline data. By using the single instruction buffer to store the instructions blocked due to the data correlation so that the subsequent instructions can continue to execute, the pipeline stall caused by the data correlation is reduced. The dynamic scheduling algorithm is implemented by a decoding control unit in hardware. The data correlation detection unit detects whether data correlation occurs in the decoded instruction, the instruction on the pipeline, and the instruction in the single instruction buffer. According to the detection result, the decoding control unit uses the status The machine sends a control signal to control the operation of the decoder, such as launching instructions, entering the instruction buffer, and inserting the idle state. The dynamic scheduling algorithm can effectively improve the utilization rate of the pipeline, reduce the pause of the pipeline, and improve the performance of the processor.

Description

Technical field [0001] The invention belongs to the technical field of microelectronics, and specifically relates to a pipeline dynamic scheduling controller and a dynamic scheduling method, and more particularly to a dynamic scheduling controller and a dynamic scheduling method related to processing single-transmitting pipeline data. Background technique [0002] In modern microprocessor design, pipeline technology is usually used to increase the speed of the processor. However, the adoption of pipeline technology will also bring data-related problems. As the current requirements for microprocessor speeds become higher and higher, the pipeline depth in the design continues to increase, and the performance loss caused by data correlation becomes more and more serious. In order to solve this problem, many complex processors with multiple launches and multi-level functional components use the Tomasulo algorithm to reduce data correlation and improve their performance. Compared with...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F9/38
Inventor 陆佳晶周晓方王俊宇
Owner FUDAN UNIV
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