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Method and device for reducing network-on-chip power consumption, CPU chip and server

An on-chip network and power consumption technology, applied in the computer field, can solve problems such as long time

Active Publication Date: 2021-02-12
HYGON INFORMATION TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, considering that it will take a long time to restore the NoC as a whole from the power-off state to the working state, in order to ensure the performance of the system, there are more requirements for the NoC as a whole to enter the power-off state during design. When the actual system is working, even if the NoC The workload is very low and there is very little chance for the NoC to be able to go into a total power down state, resulting in a lot of ineffective power consumption

Method used

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  • Method and device for reducing network-on-chip power consumption, CPU chip and server
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  • Method and device for reducing network-on-chip power consumption, CPU chip and server

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Embodiment Construction

[0113] Embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings.

[0114] It should be clear that the described embodiments are only some of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of the present invention.

[0115] On the one hand, an embodiment of the present invention provides a method for reducing power consumption of a network-on-chip. The network-on-chip NoC includes at least two network interface units NIU and at least two routing units RU, and each of the NIUs and RUs has at least two caches , the caches in the NIU and RU are independently controlled, such as figure 2 As shown, the method of this embodiment may include:

[0116] Step 101: Obtain the working status data of the NoC, the working status data include...

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Abstract

The embodiment of the invention discloses a method and device for reducing network-on-chip power consumption, a CPU chip and a server, relates to the technical field of computers, and can effectivelyreduce the network-on-chip power consumption. The method comprises the following steps: acquiring working state data of a network-on-chip (NoC), wherein the working state data comprises one or more ofthe maximum number of caches used in an NIU (Network Interface Unit) in the latest period of time and the maximum number of caches used in an RU (Remote Unit) in the latest period of time; accordingto the working state data, the number of caches needing to be opened in the NIU and the RU is calculated respectively; and closing the remaining number of caches in the NIU and the RU according to thenumber of the caches required to be opened. The method is suitable for occasions of reducing network-on-chip power consumption.

Description

technical field [0001] The invention relates to the field of computer technology, in particular to a method, device, CPU chip and server for reducing power consumption of an on-chip network. Background technique [0002] With the development of integrated circuits and the improvement of technology, the integration level of chips is constantly improving, and large-scale SOC (System on Chip, system-on-chip) design has become the mainstream. NoC (Network on Chip, network on chip) is used to realize the on-chip interconnection of various devices in the SOC, mainly including multiple network interface units (Network Interface Unit, NIU) and routing units (Router Unit, RU), such as figure 1 As shown, NIUs are at the boundary of the NoC, and each NIU is used to connect to a mounted device, and is responsible for managing all requests sent by the device and all requests sent to the device. For each request sent by the device, the NIU will record the relevant information and forward...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F1/3287G06F1/3206G06F15/78G06F15/173
CPCG06F1/3287G06F1/3206G06F15/781G06F15/173Y02D10/00
Inventor 徐祥俊黄维王科
Owner HYGON INFORMATION TECH CO LTD
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