Multi-chip package structure having chip interconnection bridge which provides power connections between chip and package substrate

Abstract

Multi-chip package structures and methods for constructing multi-chip package structures are provided, which utilize chip interconnection bridge devices that are designed to provide high interconnectdensity between adjacent chips (or dies) in the package structure, as well as provide vertical power distribution traces through the chip interconnection bridge device to supply power (and ground) connections from a package substrate to the chips connected to the chip interconnection bridge device.

Description

Technical field [0001] The present disclosure involves semiconductor package techniques, and specifically, the multi-chip package structure of a chip interconnect device is referred to. Background technique [0002] Innovation in Semiconductor Manufacturing and Packaging Technology has enabled minimal size, higher density integrated circuit (IC) chip (or die), and development has wiring and area that enables intensive encapsulation IC chip (or die). A high integrated chip module of the array input / output (I / O) contact density. For some applications, a suitable area array connection technique for module to board I / O interconnection (eg, pad grid array (LGA) or ball grid (BGA) is used, with a circuit board (for example, , One or more multi-chip modules (MCM) of the system board (or node card), printed circuit board, printed wiring board, etc.) to construct high performance electronic modules. The MCM technology can be used to form a first level package structure having a plur...

AI Technical Summary

Problems solved by technology

This configuration increases the length of the power / ground traces and therefore increases the voltage drop and IR heating within the package substrate

Images