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Semiconductor structure measuring device and measuring method thereof

A semiconductor and measurement technology, which is applied in the direction of semiconductor devices, semiconductor/solid-state device testing/measurement, electric solid-state devices, etc., can solve the problems of low accuracy, achieve the effect of improving accuracy, eliminating influence, and improving performance

Active Publication Date: 2022-04-12
YANGTZE MEMORY TECH CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0006] The invention provides a semiconductor structure measuring device and its measuring method, which are used to solve the problem of low accuracy of existing measuring devices when measuring the shape of semiconductor structures, so as to improve the performance of semiconductor devices

Method used

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  • Semiconductor structure measuring device and measuring method thereof
  • Semiconductor structure measuring device and measuring method thereof
  • Semiconductor structure measuring device and measuring method thereof

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Embodiment Construction

[0047] The specific implementation of the semiconductor structure measuring device and its measuring method provided by the present invention will be described in detail below with reference to the accompanying drawings.

[0048] When the atomic force microscope is used to measure the profile of the pattern in the semiconductor structure, the height of the pattern is generally only a few nanometers or tens of nanometers, which has high requirements for the flatness of the hardware of the measurement device itself. If the measurement If the flatness of the device itself is too poor, it will affect the accuracy of the measurement results. However, as a mechanical structure, the profile measuring part in the measuring device cannot be absolutely and completely flat. In actual use, when measuring a pattern with a length of 2mm, if the flatness of the contour measurement part can be within 5nm, the measurement result is considered to be quite accurate, and the contour measurement p...

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Abstract

The invention relates to the technical field of semiconductor device manufacturing, in particular to a semiconductor structure measuring device and a measuring method thereof. The method for measuring a semiconductor structure includes the following steps: providing a reference area, the surface flatness of which is less than or equal to the background flatness of a measuring device itself; using the measuring device to measure the reference area Obtain a reference measurement result; use the measurement device to measure the topography of a pattern area in a wafer to be measured, and obtain an initial measurement result; remove the reference from the initial measurement result The measurement result is to obtain the calibration measurement result of the pattern area. The invention can effectively eliminate the influence of the background flatness of the measurement device itself on the measurement result of the pattern area in the wafer to be measured, realizes the improvement of the accuracy of the measurement result of the wafer to be measured, and helps to improve the performance of semiconductor devices.

Description

technical field [0001] The invention relates to the technical field of semiconductor device manufacturing, in particular to a semiconductor structure measuring device and a measuring method thereof. Background technique [0002] With the development of planar flash memory, the production process of semiconductors has made great progress. However, in recent years, the development of planar flash memory has encountered various challenges: physical limits, existing development technology limits, and storage electron density limits. In this context, in order to solve the difficulties encountered in planar flash memory and pursue lower production costs per unit storage unit, various three-dimensional (3D) flash memory structures have emerged, such as 3D NOR (3D or not) flash memory and 3D NAND (3D NAND) flash memory. [0003] 3D NAND memory is a memory formed by stacking technology from two dimensions to three dimensions. With the maturity of the integrated circuit production ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/66H01L27/11524H01L27/11551H01L27/1157H01L27/11578
CPCH01L22/12H10B41/20H10B41/35H10B43/20H10B43/35
Inventor 罗少愿蒋鹏
Owner YANGTZE MEMORY TECH CO LTD