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Reconfigurable system based on digital signal processing

A technology for digital signal processing and system reconstruction, applied in transmission systems, electrical components, etc., can solve problems such as high R&D costs and unrealistic ASICs

Pending Publication Date: 2021-04-02
58TH RES INST OF CETC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

For example, at the 16nm node, the research and development cost of an integrated circuit chip is as high as 120 million to 150 million US dollars, and it often needs to sell tens of millions of chips to recover the cost, which is unrealistic for ASIC

Method used

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Embodiment 1

[0037] The present invention provides a reconfigurable system based on digital signal processing, its design structure is as follows figure 1 As shown, it includes AHB_REG module, parallel frequency mixing module, serial digital down-conversion module, CR module, related despreading module, ASK module, pattern recognition module, reconfigurable mode response module and DEBUG module. The AHB_REG module implements the interconnection with the AHB bus; the parallel frequency mixing module (PDDC) performs polyphase filtering, extraction and frequency mixing processing on the broadband signal; the serial digital down conversion module (SDDC) performs Select a broadband signal or a narrowband signal to enter the system; the CR (Connect Route) module reconstructs the signal from the serial digital down-conversion module and selects it for the relevant despreading module, ASK module or DPP module of the lower level; the The correlation despreading (CORR) module despreads the baseband ...

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PUM

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Abstract

The invention discloses a reconfigurable system based on digital signal processing, which belongs to the field of digital signal processing and integrated circuits and comprises an AHB_REG module, a parallel frequency mixing module, a serial digital down-conversion module, a CR module, a related dispreading module, an ASK module, a mode recognition module, a reconfigurable mode response module anda DEBUG module. The AHB_REG module is used for realizing interconnection with an AHB bus; the parallel frequency mixing module performs multiphase filtering, extraction and frequency mixing processing on the broadband signal; the serial digital down-conversion module selects a broadband signal or a narrowband signal to enter the system; the CR module reconstructs the signal and selects the reconstructed signal to a subordinate module; the related despreading module is used for despreading the baseband signal; the ASK module performs ASK demodulation processing on the down-conversion output signal from the CR module; the mode identification module realizes a signal identification function in a reconfigurable mode; the reconfigurable mode response module is used for realizing reconfigurablegeneration and transmission of response pulses and active inquiry pulses which are inquired in different modes; and the DEBUG module is used for debugging.

Description

technical field [0001] The invention relates to the technical fields of digital signal processing and integrated circuits, in particular to a reconfigurable system based on digital signal processing. Background technique [0002] The ever-increasing integration level and the no-reduce cost mean that the development of ASICs characterized by multiple varieties and small batches has encountered a bottleneck. Because of the extremely high cost, a lot of chips need to be sold to recover. For example, at the 16nm node, the research and development cost of an integrated circuit chip is as high as 120 million to 150 million US dollars, and it often needs to sell tens of millions of chips to recover the cost, which is unrealistic for ASIC. In order to reduce costs, the market is eager to find a platform product that can implement different applications, and expand sales and reduce costs through a large number of different applications. Therefore, it has become an inevitable choice...

Claims

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Application Information

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IPC IPC(8): H04B1/00
CPCH04B1/0003H04B1/0007
Inventor 张锐桂江华杨亮钱黎明殷庆会
Owner 58TH RES INST OF CETC
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