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SRAM (Static Random Access Memory) memory cell and memory

A storage unit and storage circuit technology, applied in static memory, digital memory information, information storage, etc., can solve the problems of increasing SRAM memory area and power consumption, complex structure of SRAM storage unit, etc., to reduce area and power consumption, Effect of reducing control signals and simplifying SRAM storage unit

Active Publication Date: 2021-05-14
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the structure of the master-slave SRAM storage unit is complicated, and more control signals are introduced, which increases the area and power consumption of the SRAM memory.

Method used

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  • SRAM (Static Random Access Memory) memory cell and memory
  • SRAM (Static Random Access Memory) memory cell and memory
  • SRAM (Static Random Access Memory) memory cell and memory

Examples

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Embodiment Construction

[0026] In order to make the technical problems, technical solutions and beneficial effects to be solved by the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

[0027] It should be noted that when an element is referred to as being “fixed” or “disposed on” another element, it may be directly on the other element or be indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or indirectly connected to the other element.

[0028] In addition, the terms "first" and "second" are used for descriptive purposes only, and cannot be interpreted as indicating or implying relative importance or implicitly specifying the quantity of indic...

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Abstract

The invention discloses an SRAM (Static Random Access Memory) storage unit and a memory, relates to the technical field of circuit design, and is used for improving data security and reducing the area and power consumption of the SRAM. The SRAM storage unit comprises a data latch circuit, a first switching circuit, a second switching circuit, a third switching circuit and a storage circuit. The data latch circuit is provided with a first output end, a second output end and a conversion node. The first switching circuit is connected in series between the second output end and the conversion node. The second switch circuit is connected in series between the first output end and the first end of the storage circuit. The third switching circuit is connected in series between the conversion node and the first end of the storage circuit. The second end of the storage circuit is used for being electrically connected with a grounding end. The SRAM memory comprises the SRAM memory cell provided by the technical scheme.

Description

technical field [0001] The invention relates to the technical field of circuit design, in particular to an SRAM storage unit and a memory. Background technique [0002] In order to protect data security, once the security chip detects unauthorized access, it will cut off the power of the Static Random-Access Memory (English full name: Static Random-Access Memory, English abbreviation: SRAM) to prevent attackers from stealing data. However, the SRAM has the problem of information retention, and usually part of the information stored in the SRAM before power failure can be restored by aging imprinting. [0003] Aging imprint means that when a storage unit stores fixed data for a long time, two symmetrical metal-oxide-semiconductor field-effect transistors (English full name: Metal-Oxide-Semiconductor Field-Effect Transistor, referred to as: MOS tube) will have different degrees of degradation. Bias temperature instability (full name in English: Bias Temperature Instability, E...

Claims

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Application Information

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IPC IPC(8): G11C11/413G11C7/12G11C5/14
CPCG11C11/413G11C7/12G11C5/148
Inventor 宿晓慧苏泽鑫李博罗家俊韩郑生
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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