Clock constraint file collection method, device, equipment and storage medium

Abstract

The embodiment of the invention discloses a clock constraint file collection method, a device, equipment and a storage medium. The method comprises the steps of obtaining a clock architecture of a chip, wherein the clock architecture comprises a plurality of clock layers, and each clock layer comprises at least one clock unit; according to the layer sequence of the clock architecture, obtaining clock definitions of all the clock layers in sequence; and obtaining a clock constraint file according to the clock definition of each clock layer. According to the technical scheme provided by the embodiment of the invention, the clock definitions of all the clock layers of which the layer sequence is located before the current clock layer are taken as the main clock of the current clock layer, and the clock definitions of all the clock layers are sequentially collected, so that the clock constraint file is collected according to the clock definitions of all the clock layers, automatic generation of the clock constraint file is realized, and the generation efficiency is improved. The writing time is saved, the development efficiency is improved, the research and development cycle of the chip is shortened. Meanwhile, the accuracy and reliability of writing the clock constraint file are improved.

Description

technical field [0001] The embodiments of the present application relate to chip technology, and in particular to a method, device, device and storage medium for acquiring a clock constraint file. Background technique [0002] With the continuous advancement of science and technology, chip technology has developed rapidly. While the size of the chip has been continuously reduced, its functionality has become stronger and stronger. The complexity of chip design has also increased exponentially. This affects the efficiency of chip research and development, especially for large-scale The efficiency of chip research and development puts forward higher requirements. [0003] As one of the core businesses of chip R&D, the development of clock constraint files plays an extremely important role in chip R&D. Traditional clock constraint files rely on manual writing, which takes a lot of time to write, and the development efficiency is extremely low, making the chip data delivery If ...

AI Technical Summary

Problems solved by technology

[0003] As one of the core businesses of chip R&D, the development of clock constraint files plays an extremely important role in chip R&D. Traditional clock constraint files rely on manual writing, which takes a lot of time to write, and the development efficiency is extremely low, making the chip data delivery The time is too long, which increases the development cycle of the chip. At the same time, the manual writing method is prone to writing errors, which leads to chaotic timing and cannot be used normally.

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