Digital modeling method and device for mixed signal circuit

Abstract

This application proposes a digital modeling method and device for a mixed signal circuit. Wherein, the method includes: obtaining the netlist file of the circuit, and the file is used to describe the topology structure of the circuit to be simulated, the external excitation signal and the simulation parameters; generating the excitation signal for the netlist file of the circuit, and performing the netlist file based on the excitation signal Simulation, combining the data generated by all excitations to obtain the complete relationship between the full coverage input and output data of the circuit and the input and output of the circuit; according to the characteristics of the circuit system, the method of dynamic mode decomposition is used to extract the full coverage input and output data Circuit features; according to the extracted circuit features and the complete relationship between the input and output of the circuit, the digital model of the circuit is constructed based on the machine learning method; the mathematical model is converted into a Verilog / Verilog‑AMS circuit model through the hardware description language, and the circuit model can be used universally in other digital circuits.

Description

technical field [0001] The application belongs to the technical field of integrated circuit design, and in particular relates to a digital modeling method and device for a mixed-signal circuit. Background technique [0002] Electronic design automation (Electronic design automation, English abbreviation: EDA) is a method for analyzing and predicting the performance of integrated circuits in the design stage with software as the carrier. The simulators for circuit simulation include HSPICE, Spectre, Verilog-AMS, Verilog, etc. Among them, the HSPICE simulator needs to solve the circuit equations of the circuit nodes, and the required simulation amount increases exponentially with the number of circuit nodes. The analog mixed signal (AMS) simulator is based on the parallel operation of the spice-based simulator and the event-driven simulator. The two interact only at the analog-digital signal boundary of the circuit, and when most systems use Hardware Description Language , En...

AI Technical Summary

Problems solved by technology

In chip design, a large number of test vectors are usually required for full-chip functional verification simulation, however, the simulation speed of HSPICE transistor-level analog circuits is slow, and a large amount of overhead is required in circuit verification

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