Method for dynamically reconfiguring simulation environment

Abstract

The invention discloses a method for dynamically reconfiguring a simulation environment, comprising the steps of: (1) newly creating one or a plurality of binary files including configuration files and simulation state record files, and establishing a connection with a simulation model; (2) establishing a one-to-one corresponding relationship between the data of the configuration files and the configuration parameters of the simulation model, and finishing an initialization setting for the configuration files and the simulation model; (3) starting a simulation excitation by the simulation model, recording each state in the simulation process in the simulation state record files, and adjusting the parameter setting of the configuration files according to the simulation state change; (4) reading the configuration files regularly by the simulation model in the simulation process and determining whether the configuration files have a data change, if so, then updating the configuration parameters by using the data read from the configuration files and adjusting the simulation system; or else, then continuing to operate the simulation; and (5) repeating the steps (3) and (4) until a simulation purpose is achieved, and then concluding the simulation process. According to the method, the simulation time is greatly reduced and the simulation is prevented from being failed.

Description

technical field [0001] The invention relates to the technical field of simulation, in particular to a method for dynamically reconfiguring a simulation environment without recompiling simulation stimulus files and without interrupting the simulation process. Background technique [0002] FPGA (Field-Programmable Gate Array, Field Programmable Gate Array) technology is in a period of rapid development. With the continuous improvement of semiconductor manufacturing technology, the scale of new chips is getting larger, the speed level is getting higher and higher, and the cost is getting higher and higher. Low-end FPGAs have gradually replaced traditional digital components, and high-end FPGAs have also begun to compete for the market share of ASICs (Application Specific Integrated Circuits, integrated circuits designed for special purposes). [0003] With the expansion of the FPGA chip scale, the complexity of the design is getting higher and higher, and more and more function...

AI Technical Summary

Problems solved by technology

[0003] With the expansion of the FPGA chip scale, the complexity of the design is getting higher and higher, and more and more functions need to be verified in the simulation test, resulting in the increasing complexity of the simulation model.

Traditional simulation verification methods cannot adjust the simulation configuration according to the simulation results during the simulation running process, and try to consider various situations when designing the simulation model

[0004] But for a complex design, especially some designs that use randomized parameter configurations, it is difficult to consider all the required test cases at once

Once it is found that the settings of the simulation model cannot meet the simulation requirements, it is necessary to modify the test code, recompile and restart the simulation environment. For some large-scale designs, when adjusting the simulation model design according to the simulation results, it often takes several hours or even Several days of time, a lot of time wasted in simulating and restarting the simulation environment, which reduces work efficiency

In addition, because the simulation model cannot be adjusted in time according to the simulation results, and the number and strategy of test cases can be increased or decreased, the simulation time is wasted for the case where the required functional coverage of the simulation has been reached; In the case of , the simulation failed because the simulation goal was not reached

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