Pin access method in integrated circuit layout wiring and device thereof

Abstract

The invention provides a pin access method in integrated circuit layout wiring and a device thereof. The method comprises the following steps: acquiring each net of a circuit net list; constructing a minimum spanning tree of each line network; according to the minimum spanning tree and the number of available metal layers, determining the pin connection relation of the wire net, wherein the pin connection relation of the wire net comprises which pins are connected and which metal layer is connected; and according to the pin connection relationship of all the wire nets, determining the wire outlet directions of all the pins. According to the method, chip PPA optimization of a traditional algorithm is not taken as a target, the target serves full automation and completeness of the process of chip back-end physical design, a pin access scheme is globally considered and designed before specific wiring, and the wiring success rate and the pin access efficiency can be improved.

Description

technical field [0001] The invention relates to the technical field of EDA design, in particular to a method and device for accessing pins in the layout and wiring of an integrated circuit. Background technique [0002] Integrated circuit (IC, also known as chip) design includes chip front-end design and back-end design. The front-end design of the chip generates the logic netlist of the circuit, and the back-end design uses the EDA (Electronic Design Automation) design tool for layout, routing and physical verification, and finally generates GDSII data for manufacturing. [0003] Layouts are used to assign physical locations to standard cells, macroblocks, etc. on the layout. After placement comes routing. Routing is used to determine the exact design of the wiring required to connect these standard cells, macroblocks. The routing step implements all required connections while following the rules and constraints of the manufacturing process. [0004] With the advancemen...

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Problems solved by technology

[0005] The existing pin access schemes have the following two major problems: (1) Lack of global consideration of the entire back-end wiring, only considering the local issues of pin access, so many times it will lead to even if the local pin access seems to be successful, However, the detailed routing (Detail Route) behind the process cannot be completed; (2) Usually pin access is performed on the grid, and special processing must be done for pins that are not on the grid, and the calculation overhead is very large, even pins It can't come out at all, which leads to the failure of the entire wiring

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