Chip packaging structure and manufacturing method thereof
A technology of chip packaging structure and manufacturing method, which is applied in the directions of antenna support/installation device, semiconductor/solid-state device manufacturing, electrical components, etc. problems, such as heat dissipation problems of high-level packaging, to achieve the effect of extending the service life
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[0064] Reference will now be made in detail to the exemplary embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used in the drawings and description to refer to the same or like parts.
[0065] Figure 1A to Figure 1J It is a schematic cross-sectional view of a manufacturing method of a chip packaging structure according to an embodiment of the present invention. figure 2 for Figure 1J A schematic top view of the chip package structure. Regarding the manufacturing method of the chip package structure of this embodiment, first, please refer to Figure 1A , providing the carrier 10 on which the adhesive layer 12 has been formed. Here, the adhesive layer 12 is, for example, a double-sided thermal release tape, but not limited thereto.
[0066] Next, please refer to Figure 1B , provide at least one chip (a chip 110 is schematically shown) and at least one heat conductio...
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