Shallow trench isolation (STI) structure for CMOS image sensor

Abstract

A shallow trench isolation (STI) structure and method of fabrication includes a two-step epitaxial growth process. A trench larger than the target STI structure is etched into a semiconductor substrate, a first layer of un-doped semiconductor material epitaxially grown in the trench to provide an STI structure having a target depth and a critical dimension, and a second layer of doped semiconductor material epitaxially grown on the first layer, the second layer filling the trench and forming a protrusion above the front-side of the semiconductor substrate.

Description

technical field [0001] The present disclosure provides a shallow trench isolation (STI) structure for an image sensor. Background technique [0002] Wafer-level manufacturing using complementary metal-oxide-semiconductor (CMOS) technology has enabled the incorporation of camera modules in many applications including automotive, security and mobile devices. For example, figure 1 A camera 190 is depicted imaging the scene. Camera 190 includes image sensor 100 including pixel array 154 . In an embodiment, pixel array 154 is an array of individual pixels formed in a semiconductor wafer substrate, such as silicon. Similar cameras used in automotive applications include, for example, rear cameras, and front and side cameras. [0003] There is a continuing need for higher resolution in image sensors, preferably achieved by increasing the number of pixels on a wafer while keeping the entire image sensor at the same size or smaller. The more pixels in an image sensor, the greate...

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It also degrades isolation resolution and causes high junction leakage due to abrupt boron to N+ junction

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