Clock adjustment method and device

Abstract

The embodiment of the invention provides a clock adjusting method and a clock adjusting device, which are used for realizing high-precision time delay adjustment on a clock. In the method, a clock control module obtains the phase discrimination frequency of a phase discrimination module, and determines the sampling period of the phase discrimination module according to the phase discrimination frequency; the clock control module determines a clock adjustment factor according to a set clock adjustment value and a sampling period; the clock control module determines a first clock adjustment factor and a second clock adjustment factor according to the clock adjustment factor; and the clock control module adjusts the phase of the OCXO through the DAC module according to the second clock adjustment factor. In the method, the clock adjustment factor is determined according to the set clock adjustment value and the sampling period, and the phase of the OCXO is adjusted through the DAC module according to the non-integer part of the clock adjustment factor, so high-precision adjustment of the clock in the clock synchronization system is realized, and the performance of the system is improved.

Description

technical field [0001] The present application relates to the technical field of communications, and in particular to a clock adjustment method and device. Background technique [0002] With the continuous update and development of communication technology, the high-performance processor in the base station is closely related to the precision of the clock. Therefore, the requirement of the base station on the precision of its clock (that is, the difference between the internal clock of the base station and the external source clock) is also Higher and higher. [0003] Currently, the base station can adjust the clock of the base station through the following solutions: [0004] First, when the clock module of the base station is in a relatively stable state (when the voltage value input by the digital to analog converter (DAC) module of the base station to the constant temperature crystal oscillator is temporarily unchanged), the clock control module of the base station obta...

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Problems solved by technology

[0006] However, the logic device structure used by the current phase detection module is relatively simple, resulting in a low sampling frequency, which is difficult to reach above 100MHz. Therefore, when the phase difference between the clock signal of the base station and the external source clock signal is less than 10ns, the phase detection The module cannot accurately detect the phase of the clock signal of the base station, so the phase adjustment of the system cannot reach 10ns, that is, the accuracy of the clock delay adjustment cannot be achieved below 10ns, and the high-precision adjustment of the clock signal cannot be realized

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