Memory operation capability prediction method

Abstract

A memory operation capability prediction method can be implemented by a memory operation capability prediction structure, the frequency of a basic input / output system (BIOS) and the delay of a read-write time sequence are rapidly changed, so that a mainboard test mode can measure accurate voltage values and current values, and the mode is similar to a mode in which a plurality of dynamic random access memory (DRAM) integrated circuit (IC) chips are used together actually, the operation range of each single DRAM IC chip can be measured in the operation mode, the operation capability of each DRAM IC chip can be predicted, the operation capability test under various conditions can be effectively carried out, and the classification precision value can be improved.

Description

technical field [0001] The present invention relates to a memory operation capability prediction method, in particular to a motherboard test method capable of measuring accurate voltage and current values, especially by rapidly changing the Basic Input / Output System (BIOS) The delay of frequency and read / write timing can measure the operating range of each dynamic random access memory (DRAM) integrated circuit (integrated circuit, IC) chip, so that each DRAM IC chip can be predicted It can effectively test the operating ability under various conditions and improve the accuracy of classification. Background technique [0002] During the manufacturing process of memory circuits and devices, such as dynamic random access memory (DRAM), it is necessary to test the memory circuits or devices. This testing is usually done using automatic test equipment (ATE) coupled to the memory circuit or device (ie, device under test (DUT)): certain predetermined test signals are generated by ...

AI Technical Summary

Problems solved by technology

However, because the test equipment like ATE is expensive, the high test cost weakens the price competitiveness; moreover, the operation capability of each single integrated circuit (IC) obtained from the test results is not carried out in the operation mode test, so that it cannot meet the needs of actual use

In addition, in addition to ATE, the known technology also uses a relatively cheap main board in actual operation mode to test multiple ICs together. This method is closer to the actual way that ICs are used to operate applications, so the main board is relatively Many people choose to use the test method; however, the most criticized disadvantage of this method is that its voltage is not accurate enough, and the current cannot be measured, so it is impossible to know which IC among many ICs consumes more power, and the timing control On the one hand, there are only frequency operable and inoperable tests

Therefore, although the motherboard is a test conducted in the actual operation mode, its classification is not accurate enough

[0004] In view of this, although the ATE method has become a standard practice in the field of memory testing, the cost of the test equipment is still very high, and each IC is not tested in the operating mode, and the motherboard is in the operating mode. Tested in the mode but the classification is not accurate enough

Therefore, it generally cannot meet the needs of users in actual use.

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