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Isolated interface integrated circuit and packaging method thereof

An integrated circuit, isolated technology, applied in the direction of circuits, electrical components, electrical solid devices, etc., can solve the problems of no integrated isolated DC-DC power supply, difficulty in meeting requirements, large chip width, etc., to ensure isolation voltage capability, Low cost, reduced distance effect

Pending Publication Date: 2021-10-15
成都市硅海武林科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In order to ensure the isolation capability, a certain distance needs to be kept between the base island A and the base island B. At the same time, the rectangular bare chips DIE1, DIE2, DIE3 and DIE4 have a certain width, so that the distance between the two rows of pins is too large, so that The width of the chip is too large, even if the SOIC wide-body package is used, it is difficult to meet the requirements
At the same time, the package does not integrate an isolated DC-DC power supply, so that both the primary end and the secondary end of the chip need to provide power

Method used

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  • Isolated interface integrated circuit and packaging method thereof
  • Isolated interface integrated circuit and packaging method thereof
  • Isolated interface integrated circuit and packaging method thereof

Examples

Experimental program
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Effect test

Embodiment 1

[0036] Such as figure 2 As shown, the present invention provides an isolated interface integrated circuit, including the digital channel original end chip DIE1 and the power channel original end chip DIE5 arranged on the first base island, and the digital channel isolation chip DIE5 arranged on the second base island The device chip DIE2, the digital channel sub-end chip DIE3 and the bus interface chip DIE4, and the power channel isolation device chip DIE6 and the power channel sub-end chip DIE7 arranged on the third base island; the first base island, the second base island and the The third base islands are isolated from each other; a circuit connection is formed between the digital channel original end chip DIE1 and the digital channel isolation device chip DIE2; a circuit connection is formed between the digital channel isolation device chip DIE2 and the digital channel secondary end chip DIE3 A circuit connection is formed between the digital channel secondary end chip D...

Embodiment 2

[0044] Such as image 3 As shown, the present invention provides an isolated interface integrated circuit packaging method, and its implementation method is as follows:

[0045] S1, the original end chip DIE1 of the digital channel, the digital channel isolation device chip DIE2, the digital channel secondary end chip DIE3, the bus interface chip DIE4, the power channel original end chip DIE5, the power channel secondary end chip DIE7 and the power channel isolation device chip DIE6 is divided into three groups;

[0046] S2. Install the first group, the second group and the third group on mutually isolated base islands;

[0047] S3. Set the digital channel original end chip DIE1 and the power channel original end chip DIE5 on the first base island, and set the digital channel isolation device chip DIE2, the digital channel secondary end chip DIE3 and the bus interface chip DIE4 on the second base island And disposing the power channel isolation device chip DIE6 and the power...

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Abstract

The invention provides an isolated interface integrated circuit and method, and belongs to the technical field of integrated circuits. The isolated interface integrated circuit comprises a digital channel primary end chip DIE1 and a power channel primary end chip DIE5 which are arranged on a first base island, a digital channel isolation device chip DIE2, a digital channel secondary end chip DIE3 and a bus interface chip DIE4 which are arranged on a second base island, and a power channel isolation device chip DIE6 and a power channel secondary end chip DIE7 which are arranged on a third base island, and the first base island, the second base island and the third base island are mutually isolated. According to the present invention, a packaging method for a multi-DIE integrated isolated interface is simple in process and low in cost, and an isolated DC-DC power source and an isolated interface chip are integrated together, so that the chip only needs to supply power at the original end, no extra power source needs to be provided at the auxiliary end; and by means of the scheme, a chip machining process is easy to achieve, and the cost is low.

Description

technical field [0001] The invention belongs to the technical field of integrated circuits, and in particular relates to an integrated circuit with an isolated interface and a packaging method thereof. Background technique [0002] For effective communication between different electronic devices or between different electronic components in the same device, certain bus standards must be followed at the same time, some bus standards, such as RS-485, RS-232, RS-422, CAN and other standards, The electrical characteristics of the bus interface are specified, and the integrated circuit chip with this electrical characteristic is called a bus interface chip. In order to effectively reduce the interference and noise introduced between devices, between electronic components and the bus, the bus interface chip can be used in conjunction with a digital isolator, and the digital isolator can be used to eliminate the interference. To realize the combination of the bus interface chip an...

Claims

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Application Information

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IPC IPC(8): H01L25/16H01L21/48H01L21/56H01L23/50
CPCH01L25/16H01L23/50H01L21/56H01L21/485
Inventor 文守甫罗和平王佐高雨竹袁思彤
Owner 成都市硅海武林科技有限公司