Magnetic process design method of STT-MRAM related circuit

A related circuit and process design technology, applied in the field of magnetic process design, can solve the problems of not including the relevant content of STT-MRAM unit and the inability to use STT-MRAM circuit design

Pending Publication Date: 2021-10-19
HEFEI INNOVATION RES INST BEIHANG UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The existing technology does not include the relevant content of STT-MRAM cells, so it can only be used in traditional CMOS circuits, and cannot be used in new STT-MRAM circuit designs

Method used

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  • Magnetic process design method of STT-MRAM related circuit
  • Magnetic process design method of STT-MRAM related circuit

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Embodiment Construction

[0033] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments It is a part of embodiments of the present invention, but not all embodiments.

[0034] The magnetic process design method of the STT-MRAM related circuit described in this embodiment includes the following contents:

[0035] like figure 1 As shown, the developed MPDK contains the following four files:

[0036] 1) MTJ unit library

[0037] The developed STT-MTJ unit library mainly includes the following four files: SPICE simulation model veriloga, symbol symbol, layout and auCdl.

[0038]Simulation model: VerilogA programming language is used to describe the electrical behavior characteristics of the device, including object...

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Abstract

The invention relates to a magnetic process design method for a STT-MRAM related circuit, which is used for design of the STT-MRAM related circuit and comprises the steps that a design system is configured through a computer tool, the design system comprises an STT-MTJ cell library, a standard cell library, a process file and a physical verification rule file, and the STT-MTJ cell library comprises the following files: an SPICE simulation model veriloga, a symbol, a layout and auCdl; the standard cell library comprises circuit diagrams, symbols and layouts of a 1T1R basic storage unit, an NAND gate, a NOR gate and a read-write circuit basic unit based on MTJ design, and can be directly called in the design process. The magnetic process design package comprises various files necessary for STT-MRAM related circuit design, and can assist in completing the whole-process design of the STT-MRAM; the design rule can be flexibly configured according to the data of the flow sheet of the process manufacturer, so that the reliability and the practicability are high; and the magnetic process design package has high flexibility and can be compatible with traditional process design packages of different process nodes through simple modification.

Description

technical field [0001] The invention relates to the technical fields of integrated circuit design and nonvolatile memory circuits, in particular to a magnetic process design method for STT-MRAM related circuits. Background technique [0002] PDK (Process Design Kit): PDK uses the design language of the EDA manufacturer to define a set of documents reflecting the characteristics of the process, which is used by the circuit designer. It is the cornerstone for the design company to do physical verification, and it is also the key to the success or failure of the tape-out sex factor. PDK is a necessary tool for electrical design and physical design, and manufacturers also produce according to the layout designed based on PDK, and the results of the final test are used to iteratively optimize PDK. In general, PDK closely combines circuit design, EDA tools and process, and participates in all steps of integrated circuit design and production, and is an essential tool for integrat...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F30/367G06F30/398
CPCG06F30/367G06F30/398
Inventor 王佑侯正义赵巍胜
Owner HEFEI INNOVATION RES INST BEIHANG UNIV
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