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Semiconductor device and manufacturing method

A manufacturing method and semiconductor technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, transistors, etc., can solve problems such as increasing manufacturing costs, and achieve the effect of improving instability

Active Publication Date: 2022-01-28
晶芯成(北京)科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] However, forming gates with different thicknesses requires an additional mask process compared to forming gates with the same thickness, so there is a technical problem of increasing manufacturing costs

Method used

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  • Semiconductor device and manufacturing method
  • Semiconductor device and manufacturing method
  • Semiconductor device and manufacturing method

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Experimental program
Comparison scheme
Effect test

Embodiment 3

[0106] Figure 13 Shown is a schematic cross-sectional view of each step of the manufacturing method of the semiconductor device according to the third embodiment of the present invention. Figure 13 as Figure 11 The schematic cross-sectional view of the manufacturing method of the semiconductor device 200 is intended to emphasize the various parts constituting the semiconductor device 200 , and the dimensions in the plane direction and the thickness direction of each part may not be drawn according to the actual scale.

[0107] The difference between the third embodiment and the second embodiment is that the nitrided film as a hard mask layer is superimposed on the laminated layer of the gate insulating layer 22 and the gate electrode 24 and on the laminated layer of the gate insulating layer 36 and the gate electrode 38 . Silicon layer 42 . Therefore, during the formation of the recessed region X, the photoresist layer R is replaced by the silicon nitride layer 42 .

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Abstract

The invention provides a semiconductor device and a manufacturing method. The semiconductor device includes a semiconductor substrate and a MOS transistor formed on the surface area of ​​the semiconductor substrate, the MOS transistor has a gate insulating layer and a gate stacked on the surface of the semiconductor substrate, and the semiconductor The surface of the substrate has a recessed area that is not covered by the gate insulating layer and connected to the covered area of ​​the gate insulating layer, and the semiconductor substrate of the recessed area is formed with the LDD area of ​​the MOS transistor, which can be used without In the case of increasing costs, the setting of the LDD region of the MOS transistor can achieve the purpose of improving the instability of hot carriers, and the MOS transistor has high resistance and low leakage current characteristics for hot carriers. The manufacturing method can manufacture the above-mentioned semiconductor device.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a semiconductor device and a manufacturing method. Background technique [0002] For semiconductor devices that form a variety of MOSFETs on silicon substrates, core MOSFETs (core MOSFETs, which are used for core functions in semiconductor devices) and input / output MOSFETs (I / O MOSFETs, which are used in semiconductor devices) The gate insulating material of the MOSFET that functions as an input / output) has different thicknesses, and the gate is usually formed by the same deposition and etching process, so the gate thickness of the core MOSFET and the input / output MOSFET are the same. For example, for a 55nm technology node, the gate thickness needs to be set at about 100nm. When forming the LDD region (Lightly Doped Drain Region) of the input / output MOSFET, the LDD region is formed by performing ion implantation using a gate as a mask and using low implantation energy. ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/78H01L21/336H01L27/088H01L21/8234
CPCH01L29/7833H01L29/7834H01L29/6659H01L29/66598H01L27/088H01L21/823418
Inventor 石田浩大田裕之
Owner 晶芯成(北京)科技有限公司