Unlock instant, AI-driven research and patent intelligence for your innovation.

Layout structure of anti-fuse array

A technology of antifuse array and layout structure, which is applied in the direction of electrical components, electric solid devices, circuits, etc., can solve the problems of large area and necessary distance of the layout structure of antifuse array, and achieve the reduction of the number of modules and the reduction of area Effect

Pending Publication Date: 2021-10-29
CHANGXIN MEMORY TECH INC
View PDF8 Cites 1 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The antifuse array in the related art includes 4 modules. Usually, the layout design engineer will design the layout structure of the antifuse array according to the flow direction of the signal flow of the antifuse array. However, this will lead to the layout structure of the antifuse array The necessary distance between the modules in the system is too large, which leads to a large area of ​​the antifuse array layout structure

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Layout structure of anti-fuse array
  • Layout structure of anti-fuse array
  • Layout structure of anti-fuse array

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0050] Exemplary embodiments disclosed in the present application will be described in more detail below with reference to the accompanying drawings. Although exemplary embodiments of the present application are shown in the drawings, it should be understood that the present application may be embodied in various forms and should not be limited to the specific embodiments set forth herein. Rather, these embodiments are provided for a more thorough understanding of the present application and for fully conveying the scope disclosed in the present application to those skilled in the art.

[0051] In the following description, numerous specific details are given in order to provide a more thorough understanding of the present application. It will be apparent, however, to one skilled in the art that the present application may be practiced without one or more of these details. In other examples, in order to avoid confusion with the present application, some technical features kno...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The embodiment of the invention provides a layout structure of an anti-fuse array. The layout structure of the anti-fuse array at least comprises an array circuit region and a functional circuit region; the array circuit region is electrically connected with the functional circuit region; the functional circuit region is located on at least one side of the array circuit region, and at least one side of the array circuit region is located on the edge of the layout structure; the array circuit region comprises an anti-fuse array formed by anti-fuse units, and the array circuit region is used for providing the anti-fuse units under different column addresses for the functional circuit region; and the functional circuit region is used for executing fusing operation on the anti-fuse units under the different column addresses.

Description

technical field [0001] The present application relates to the field of semiconductor technology, and relates to but not limited to a layout structure of an antifuse array. Background technique [0002] An anti-fuse device (Anti-fuse) is a one-time programmable device (One Time Program, OTP), and is widely used in a memory such as a dynamic random access memory (Dynamic Random Access Memory, DRAM). The antifuse device is a semiconductor device composed of two conductive layers and a dielectric layer between the conductive layers. When not programmed, the conductive layer is separated by the dielectric layer, and the two ends of the antifuse are disconnected; when programming (high voltage is applied), the dielectric layer is broken down by the high voltage, and an electrical connection is formed between the conductive layers on both sides, and the antifuse is short-circuited (fusing). This fusing process is physically one-time, permanent, and irreversible. The logic values...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): H01L27/02H01L23/525
CPCH01L27/0207H01L23/5252
Inventor 王林
Owner CHANGXIN MEMORY TECH INC
Features
  • R&D
  • Intellectual Property
  • Life Sciences
  • Materials
  • Tech Scout
Why Patsnap Eureka
  • Unparalleled Data Quality
  • Higher Quality Content
  • 60% Fewer Hallucinations
Social media
Patsnap Eureka Blog
Learn More

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2025 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com