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FreeRTOS task running method and device based on multi-core CPU

A task, multi-core technology, applied in multi-programming devices, program control design, instruments, etc., can solve the problems of not supporting multi-core CPU, unable to support simultaneous operation, multi-core CPU unable to fully utilize CPU performance, etc., to achieve the effect of ensuring performance

Pending Publication Date: 2022-01-11
HAINING ESWIN IC DESIGN CO LTD +1
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Problems solved by technology

[0004] However, the existing FreeRTOS real-time operating system can only run on a single-core CPU, and does not support multi-core CPUs. For example, for multiple tasks created, it cannot support real simultaneous operation, resulting in the inability to fully utilize the CPU for multi-core CPUs. performance

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  • FreeRTOS task running method and device based on multi-core CPU
  • FreeRTOS task running method and device based on multi-core CPU
  • FreeRTOS task running method and device based on multi-core CPU

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Embodiment Construction

[0079] Exemplary embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. Although exemplary embodiments of the present invention are shown in the drawings, it should be understood that the invention may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided for more thorough understanding of the present invention and to fully convey the scope of the present invention to those skilled in the art.

[0080] The embodiment of the present invention provides a FreeRTOS running task method based on multi-core CPU, such as figure 1 As shown, the method is that when the FreeRTOS real-time operating system runs on a multi-core CPU, it can support multiple tasks to run simultaneously, and this embodiment of the invention provides the following specific steps:

[0081] 101. Initially configure a multi-core CPU, where the multi-core includes a target...

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Abstract

The invention discloses a FreeRTOS task running method and device based on a multi-core CPU, relates to the technical field of embedded real-time operating systems, and enables a FreeRTOS real-time operating system to support multi-task running of the multi-core CPU. According to the main technical scheme, if a target core preempts a spin lock to access a global task ready table, a first task can be determined according to the priority of tasks in the global task ready table and a core task ready table of the target core, tasks which are not bound with the core are stored in the global task ready table, and each core has a core task ready table corresponding to the core and stores tasks bound with the core; the target core runs the first task and releases the spin lock; and when the target core runs the first task, if other cores preempt the spin lock to access the global task ready table, the second task can be determined according to the priority of the tasks in the global task ready table and the own core task ready table, and the second task is run.

Description

technical field [0001] The invention relates to the technical field of embedded real-time operating systems, in particular to a multi-core CPU-based FreeRTOS running task method and device. Background technique [0002] The open source embedded real-time operating system (Free Real Time Operating System, FreeRTOS) is a lightweight operating system, and its functions include: task management, time management, semaphore, message queue, memory management, recording function, software Timers, coroutines, etc., using FreeRTOS can make more reasonable and effective use of CPU resources, simplify the design of application software, shorten the system development time, and better ensure the real-time performance and reliability of the system. [0003] Currently, FreeRTOS can already support CPUs with multiple architectures, including the RiscV architecture. RiscV, or RISC-V (pronounced "risk-five" in English), is a brand-new instruction set architecture originally developed by Prof...

Claims

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Application Information

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IPC IPC(8): G06F9/50G06F9/48
CPCG06F9/5038G06F9/4881G06F9/5022G06F2209/5021G06F2209/484
Inventor 张雷正
Owner HAINING ESWIN IC DESIGN CO LTD
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