Memory computing eDRAM accelerator for convolutional neural network

Abstract

The invention provides a memory computing eDRAM accelerator for a convolutional neural network. The accelerator is characterized by comprising four P2ARAM blocks, each P2ARAM block comprises a 5T1C ping-pong eDRAM bit cell array consisting of 64 x 16 5T1C ping-pong eDRAM bit cells, in each P2ARAM block, 64 x 2 digital time converters convert 4-bit activation values into different pulse widths from a row direction, the pulse widths are input into a 5T1C ping-pong DRAM bit cell array for calculation; and 16 x 2 convolution result outputs are obtained in the column direction of the 5T1C ping-pong DRAM bit cell array. According to the convolutional neural accelerator provided by the invention, a 5T1C ping-pong DRAM bit unit is used for parallel multi-bit storage and convolution; and under the condition of not additionally increasing the area overhead, the input sampling capacitance of an accumulation bit line is allocated to a symbol-numerical SAR ADC unit of a CDAC array, and an S2M-ADC scheme is provided. In the way, the in-memory computing neural network accelerator based on the eDRAM, disclosed by the invention, has the peak value reaching computing density of 59.1 TOPS / mm<2> which is about 30 times higher than the previous working density.

Description

technical field [0001] The invention relates to an eDRAM-based CIM CNN accelerator. Background technique [0002] Among various deep neural network structures, Convolutional Neural Network (CNN) is the most widely used one, which was proposed by LeCun in 1989 [1]. Early CNNs were successfully applied to handwritten character image recognition [1-3]. In 2012, deepening the AlexNet network [4] was successful. Since then, CNN has flourished and been widely used in various fields, achieving state-of-the-art results on many problems. After the emergence of AlexNet, convolutional neural networks were quickly applied to various tasks of machine vision, including pedestrian detection, face recognition, target segmentation, target tracking and other issues, and all achieved success [5-8]. In terms of hardware implementation, compute-in-memory (CIM) is a promising computing platform for implementing neural networks for high-throughput constrained artificial intelligence application...

AI Technical Summary

Problems solved by technology

[0003] However, as shown in Fig. 1, current multi-bit eDRAM-based CIM CNN accelerators still face some challenges in further improving the throughput

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