Three-dimensional memory, preparation method thereof and electronic equipment
A memory, three-dimensional technology, applied in the direction of circuits, electrical components, electrical solid devices, etc., to achieve the effect of good structural stability
Pending Publication Date: 2022-02-18
YANGTZE MEMORY TECH CO LTD
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Problems solved by technology
[0005] Embodiments of the present disclosure provide a three-dimensional memory, its preparation method, and electronic equipment, aiming to solve the problem of improving the structural stability of the three-dimensional memory
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[0050] The technical solutions in some embodiments of the present disclosure will be clearly and completely described below in conjunction with the accompanying drawings. Apparently, the described embodiments are only some of the embodiments of the present disclosure, not all of them. All other embodiments obtained by persons of ordinary skill in the art based on the embodiments provided in the present disclosure belong to the protection scope of the present disclosure.
[0051] In the description of the present disclosure, it should be understood that the orientation or positional relationship indicated by the terms "upper", "lower", "front", "rear", "bottom", "inner" and "outer" are based on the attached The orientation or positional relationship shown in the figure is only for the convenience of describing the present disclosure and simplifying the description, and does not indicate or imply that the referred device or element must have a specific orientation, be constructed...
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The invention provides a three-dimensional memory, a preparation method thereof and electronic equipment, relates to the technical field of semiconductor chips, and aims to solve a problem of improving structural stability of the three-dimensional memory. The three-dimensional memory comprises a semiconductor layer, a laminated structure, a channel structure, a second dielectric layer and a grid line isolation structure, wherein the laminated structure is arranged on the semiconductor layer and comprises first dielectric layers and gate layers which are alternately laminated; the channel structure penetrates through the laminated structure and the semiconductor layer; the second dielectric layer is at least partially disposed between the gate layer and the channel structure; the grid line isolation structure penetrates through the laminated structure and the semiconductor layer; and the grid line isolation structure comprises an insulation isolation part which is in contact with the semiconductor layer.
Description
technical field [0001] The present disclosure relates to the technical field of semiconductor chips, and in particular to a three-dimensional memory, a manufacturing method thereof, and electronic equipment. Background technique [0002] As the feature size of the memory cell approaches the lower limit of the process, the planar process and manufacturing technology becomes challenging and expensive, which causes the storage density of 2D or planar NAND flash memory to approach the upper limit. [0003] In order to overcome the limitations brought by 2D or planar NAND flash memory, the industry has developed a memory with a three-dimensional structure (3D NAND), which increases storage density by three-dimensionally arranging memory cells on a substrate. [0004] How to improve the reliability of the three-dimensional memory manufacturing process and improve the structural stability of the three-dimensional memory is an urgent problem to be solved. Contents of the invention...
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IPC IPC(8): H01L27/11582H01L27/1157H01L27/11556H01L27/11524H10B43/27H10B41/27H10B41/35H10B43/35
CPCH10B41/35H10B41/27H10B43/35H10B43/27
Inventor 吴林春张坤周文犀
Owner YANGTZE MEMORY TECH CO LTD