Nano metal via hole interconnection method based on thermal shrinkage

A technology of nano metal and nano metal particles, applied in the fields of nanotechnology, nanotechnology, nanotechnology for material and surface science, can solve problems such as processing defects, low hole filling efficiency, failure, etc., to improve electrical and thermal conductivity performance, reduction of machining defects, the effect of a simple method

Pending Publication Date: 2022-03-01
GUANGDONG UNIV OF TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] Hole filling by electroplating is prone to processing defects during the hole filling process, such as holes and clamp filling defects, which on the one hand affect the electrical and thermal conductivity of blind holes, on the other hand due to the thermal

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  • Nano metal via hole interconnection method based on thermal shrinkage
  • Nano metal via hole interconnection method based on thermal shrinkage
  • Nano metal via hole interconnection method based on thermal shrinkage

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Embodiment 1

[0034] see figure 1 , this embodiment discloses a thermal shrinkage-based nano-metal via interconnection method, including the following steps:

[0035] (1) Select a material with thermal shrinkage properties or a material with a negative coefficient of thermal expansion as the material of the substrate 1. There is a through hole 2 on the substrate 1, and the diameter of the through hole 2 is D 0 , the depth is h;

[0036] (2) Using the tensioning device 3, symmetrical tensile stress is applied to both sides of the substrate 1, and the tensile stress initially applied is the initial tensile stress τ 0 , the substrate 1 is subjected to initial tensile stress, so that the substrate 1 is in a state of tensile stress, and the through hole 2 on the substrate 1 expands outward, and the diameter of the through hole 2 is D at this time;

[0037] (3) Select a kind of nano-metal particle 4 as the filling material, and fill the nano-metal particle 4 into the through hole 2 of the subst...

Embodiment 2

[0064] Other steps in this embodiment are the same as in Embodiment 1, the difference is that the material of the substrate 1 is epoxy resin, and the diameter of the through hole 2 on the substrate 1 is D 0 is 10 μm, the depth h is 100 μm, and the material filled in the through hole 2 is copper nanoparticles. In order to ensure that the thermal shrinkage rate of the substrate 1 is 15%, a tensile stress of 250Mpa is applied to the substrate 1 through the tensioning device 3, that is, the initial tensile stress is 250Mpa, so that the substrate 1 is in a state of tensile stress, and then the nano-copper particles are filled into the through hole. Hole 2, make it fill the entire through hole 2, and then pass the mixed gas of hydrogen and argon, and start to heat up and sinter the substrate 1, from room temperature to 400°C; The solidification time of the particles is 120min. As the sintering proceeds, the applied tensile stress gradually decreases; when the sintering time reaches ...

Embodiment 3

[0066] Other steps in this embodiment are the same as in Embodiment 1, the difference is that the material of the substrate 1 is epoxy resin, and the diameter of the through hole 2 on the substrate 1 is D 0 is 50 μm, the depth h is 150 μm, and the material filled in the through hole 2 is copper nanoparticles. In order to ensure that the thermal shrinkage rate of the substrate 1 is 30%, a tensile stress of 600Mpa is applied to the substrate 1 through the tensioning device 3, that is, the initial tensile stress is 600Mpa, so that the substrate 1 is in a state of tensile stress, and then the nano-copper particles are filled into the through In the hole 2, make it fill the entire through hole 2, and then pass in the mixed gas of hydrogen and argon, and start the heating and sintering of the substrate 1, from room temperature to 800°C; during the heating and sintering process, set the nano-copper The solidification time of the particles is 180min. As the sintering proceeds, the app...

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Abstract

The invention discloses a nano-metal via hole interconnection method based on thermal shrinkage, which comprises the following steps of: (1) enabling a substrate to be in a tensile stress state by adopting a tensioning device; (2) filling the nano metal particles into the through holes of the substrate until the whole through holes are filled with the nano metal particles; (3) heating and sintering the substrate under controllable gas; in the sintering process, the tensile stress is gradually reduced through a tensioning device, the base plate is gradually shrunk, and the nano metal particles in the through holes are extruded; and (4) grinding or polishing the surface of the filled substrate. According to the method, under the thermal shrinkage condition, the nano metal is extruded, so that the filled nano metal particles have high compactness, machining defects in hole filling are reduced, the structure of the nano metal is stable, and the electric conduction and heat conduction performance of the nano metal is improved; and the method is simple to operate, higher in efficiency and capable of reducing environmental pollution.

Description

technical field [0001] The invention relates to the field of semiconductor and integrated circuit manufacturing, in particular to a method for interconnecting nanometer metal vias based on heat shrinkage. Background technique [0002] As electronic products become more and more widely used, the demand for small and powerful integrated circuits and circuit boards is also increasing. In the manufacturing process of integrated circuits or circuit boards, usually in the various layers of integrated circuits or circuit boards Through holes or blind holes are set on the substrate, and the interconnection of each layer is realized through the hole filling process, thereby reducing delay, reducing energy consumption and improving integration. [0003] In recent years, with the rapid expansion of various forms of substrates in the field of microelectronics applications, the need to reduce the cost of packaging substrates has also increased. At present, the commonly used via intercon...

Claims

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Application Information

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IPC IPC(8): H01L21/48H05K3/42B82Y30/00
CPCH01L21/486H05K3/42B82Y30/00
Inventor 杨冠南左炎黄钰森崔成强张昱
Owner GUANGDONG UNIV OF TECH
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