Wafer-level chip packaging structure, packaging method and electronic equipment

A wafer-level chip and packaging structure technology, applied in the direction of circuits, electrical components, electrical solid devices, etc., can solve the problems of unclear printing and marking, and achieve the effect of easy to keep clear, not easy to warp, and not easy to damage

Active Publication Date: 2022-03-01
FOREHOPE ELECTRONICS NINGBO CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In the prior art, printed marks are made on the packaging structure, but the printed marks are often set on the adhesive film, and the printed marks are easy to be unclear due to wear and tear after long-term use

Method used

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  • Wafer-level chip packaging structure, packaging method and electronic equipment
  • Wafer-level chip packaging structure, packaging method and electronic equipment
  • Wafer-level chip packaging structure, packaging method and electronic equipment

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Embodiment Construction

[0055] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments It is a part of embodiments of the present invention, but not all embodiments. The components of the embodiments of the invention generally described and illustrated in the figures herein may be arranged and designed in a variety of different configurations.

[0056] Accordingly, the following detailed description of the embodiments of the invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely represents selected embodiments of the invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art wi...

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PUM

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Abstract

The invention provides a wafer-level chip packaging structure, a packaging method and electronic equipment, and relates to the field of semiconductors. The wafer-level chip packaging structure provided by the embodiment of the invention comprises a carrier structure, a chip, a plastic package body, a rewiring layer and a metal bump. The carrier structure is used as a part of a product so that the packaging structure is not easy to warp, and the printing mark can be arranged on the carrier structure, so that compared with the prior art in which the printing mark is arranged on a back adhesive film, the printing mark arranged in the mode is not easy to be unclear due to abrasion. Therefore, the wafer-level chip packaging structure provided by the embodiment of the invention is not easy to warp, and the printed mark is not easy to damage due to abrasion and is easy to keep clear. The wafer-level chip packaging method provided by the invention is used for manufacturing the wafer-level chip packaging structure. The electronic equipment provided by the embodiment of the invention comprises the wafer level chip packaging structure.

Description

technical field [0001] The present invention relates to the technical field of semiconductors, in particular to a wafer-level chip packaging structure, packaging method and electronic equipment. Background technique [0002] With the rapid development of the semiconductor industry, fan-out wafer level packaging (Fan-out wafer levelpackage, FOWLP) is widely used in the semiconductor industry. Its main advantages are high-density integration, small package size, superior product performance, and fast signal transmission frequency. In the prior art, a printed mark is made on the packaging structure, but the printed mark is often set on the back adhesive film, and the printed mark is easy to be unclear due to wear and tear after long-term use. Contents of the invention [0003] The object of the present invention includes providing a wafer-level chip packaging structure, packaging method and electronic equipment, the printed marks of which are not easy to become unclear due t...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/544H01L23/498H01L21/48
CPCH01L23/544H01L23/49811H01L21/4846H01L2224/18
Inventor 陈泽张聪
Owner FOREHOPE ELECTRONICS NINGBO CO LTD
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