Pad structure, semiconductor structure, semiconductor packaging structure and preparation method thereof
A packaging structure and semiconductor technology, applied in the fields of semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components, etc., can solve the problem of easy separation of semiconductor units, avoid separation, reduce driving force, and reduce expansion. volume effect
Pending Publication Date: 2022-03-18
CHANGXIN MEMORY TECH INC
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Problems solved by technology
[0004] In view of this, an embodiment of the present invention provides a pad structure, a semiconductor structure, a semiconductor package structure and a preparation method thereof, which are used to solve the technical problem of easy separation between semiconductor units during bonding
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[0058] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments It is a part of embodiments of the present invention, but not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of the present invention.
[0059] In the present invention, unless otherwise specified, the terms "installation", "connection", "connection", "fixation" and other terms should be understood in a broad sense, for example, it can be a fixed connection or a detachable connection, Or integrally formed, it can be mechanically connected, it can be electrically connected or can co...
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The embodiment of the invention relates to the technical field of semiconductor packaging, in particular to a bonding pad structure, a semiconductor structure, a semiconductor packaging structure and a preparation method thereof. The embodiment of the invention aims to solve the technical problem that the packaging quality of a semiconductor device is affected due to the fact that adjacent semiconductors are easy to separate due to thermal expansion during bonding in the prior art. According to the bonding pad structure, the semiconductor structure and the semiconductor packaging structure provided by the embodiment of the invention, the internal part of the bonding pad layer is coated with the hysteresis expansion block subjected to high-temperature tempering treatment; the hysteresis expansion blocks which are tempered at high temperature do not expand or have very small expansion amount during bonding, and the hysteresis expansion blocks extend into the bonding pad layer and can replace part of the volume of the bonding pad layer, so that the expansion volume of the bonding pad layer is reduced in the bonding process, the driving force for driving two adjacent semiconductor units to be separated is further reduced, and the bonding efficiency is improved. And separation between two adjacent semiconductor units in the bonding process is avoided.
Description
technical field [0001] Embodiments of the present invention relate to the technical field of semiconductor packaging, and in particular to a pad structure, a semiconductor structure, a semiconductor packaging structure and a manufacturing method thereof. Background technique [0002] With the development of integrated circuit technology, multiple semiconductor units (such as wafers or chips) are stacked and arranged, and two adjacent semiconductor units, specifically, between two adjacent wafers or two adjacent chips Bonding to form semiconductor devices with higher performance has become a research hotspot. [0003] In the related art, there are adjacent first semiconductor units and second semiconductor units in the semiconductor device, and pads are arranged in the dielectric layers facing the two. However, during the bonding process, thermal expansion of the first semiconductor unit and the second semiconductor unit is easy to cause The two semiconductor units are separ...
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IPC IPC(8): H01L23/488H01L21/48
CPCH01L23/488H01L21/4814H01L24/13H01L24/11H01L2224/1302H01L2224/11013H01L21/48H01L21/60
Inventor 吴秉桓
Owner CHANGXIN MEMORY TECH INC